Merge "ARM: dts: qcom: Add PCM properties to HS-I2S node" (8ba5e1cf) · Commits · e / devices / android_kernel_xiaomi_sm6125

Documentation/devicetree/bindings/sound/qcom,hsi2s.txt

+82 −3

Original line number	Diff line number	Diff line
		@@ -43,13 +43,68 @@ Required properties:
		- qcom,iova-mapping: Specifies the start address and size of iova space
		- bit-clock-hz : Default bit clock frequency in hertz
		- data-buffer-ms : Default periodic interrupt interval in milliseconds
		- bit-depth : Bit depth of the I2S data
		- spkr-channel-count : Number of speaker channels
		- mic-channel-count : Number of mic channels

		Optional properties:

		- qcom,smmu-s1-bypass: Boolean, if present S1 bypass is enabled
		- bit-depth : Bit depth of the I2S data
		Default - 32
		- spkr-channel-count : Number of speaker channels
		Default - 2
		- mic-channel-count : Number of mic channels
		Default - 2
		- pcm-rate : Number of bit clocks per PCM frame
		0 - ENUM_8
		1 - ENUM_16
		2 - ENUM_32 (Default)
		3 - ENUM_64
		4 - ENUM_128
		5 - ENUM_256
		- pcm-sync-src : Specifies whether the PCM block uses internal or
		external sync
		0 - External (Default)
		1 - Internal
		- aux-mode : Specifies the type of sync expected/generated by the
		PCM block.
		0 - PCM (Short sync) (Default)
		1 - Aux PCM (Long sync)
		- rpcm-width : Number of bits per receive slot
		0 - 8 bits
		1 - 16 bits (Default)
		- tpcm-width : Number of bits per transmit slot
		0 - 8 bits
		1 - 16 bits (Default)
		- enable-tdm : Specifies whether TDM is enabled by default
		0 - Disable TDM
		1 - Enable TDM (Default)
		- tdm-rate : Number of bit clocks per TDM frame
		Maximum permissible value is 512
		Default - 32
		- tdm-rpcm-width : Number of bits per receive slot in TDM
		Maximum permissible value is 32
		Default - 16
		- tdm-tpcm-width : Number of bits per transmit slot in TDM
		Maximum permissible value is 32
		Default - 16
		- tdm-sync-delay : Specifies the data delay relative to sync pulse
		0 - First data appears two cycles after frame pulse
		1 - First data appears one cycle after frame pulse
		2 - First data and frame pulse occur on the same cycle
		Default - 2
		- tdm-inv-sync : Specifies whether the frame sync has to be inverted
		in long sync(Aux PCM) mode
		0 - Do not invert frame sync (Default)
		1 - Invert frame sync
		- pcm-lane-config : Specifies the PCM data lane configuration
		0 - Single lane
		D0 - MIC
		D1 - SPEAKER
		1 - Multi lane Rx (Default)
		D0 - MIC
		D1 - MIC
		2 - Multi lane Tx
		D0 - SPEAKER
		D1 - SPEAKER

		Example:

		@@ -88,6 +143,18 @@ hsi2s: qcom,hsi2s {
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};

		sdr1: qcom,hs1_i2s {
		@@ -108,5 +175,17 @@ hsi2s: qcom,hsi2s {
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};
		};

arch/arm64/boot/dts/qcom/sa6155-adp-air.dtsi

+24 −0

Original line number	Diff line number	Diff line
		@@ -86,6 +86,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};

		sdr1: qcom,hs1_i2s {
		@@ -106,6 +118,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};
		};

arch/arm64/boot/dts/qcom/sa6155-adp-star.dtsi

+24 −0

Original line number	Diff line number	Diff line
		@@ -79,6 +79,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};

		sdr1: qcom,hs1_i2s {
		@@ -99,6 +111,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};
		};

arch/arm64/boot/dts/qcom/sa8155-vm.dtsi

+36 −0

Original line number	Diff line number	Diff line
		@@ -56,6 +56,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};

		sdr1: qcom,hs1_i2s {
		@@ -73,6 +85,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};

		sdr2: qcom,hs2_i2s {
		@@ -90,6 +114,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};
		};

arch/arm64/boot/dts/qcom/sa8155.dtsi

+36 −0

Original line number	Diff line number	Diff line
		@@ -533,6 +533,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};

		sdr1: qcom,hs1_i2s {
		@@ -553,6 +565,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};

		sdr2: qcom,hs2_i2s {
		@@ -573,6 +597,18 @@
		bit-depth = <32>;
		spkr-channel-count = <2>;
		mic-channel-count = <2>;
		pcm-rate = <2>;
		pcm-sync-src = <0>;
		aux-mode = <0>;
		rpcm-width = <1>;
		tpcm-width = <1>;
		enable-tdm = <1>;
		tdm-rate = <32>;
		tdm-rpcm-width = <16>;
		tdm-tpcm-width = <16>;
		tdm-sync-delay = <2>;
		tdm-inv-sync = <0>;
		pcm-lane-config = <1>;
		};
		};