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Commit 8b208afd authored by Veera Vegivada's avatar Veera Vegivada Committed by Gerrit - the friendly Code Review server
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clk: qcom: gcc: Add support for USB3 resets 



Add the required USB3 uniphy resets which are needed
by usb3 phy.

Change-Id: I95c7df7be9f6716a3703e59bc2dba2af49baba30
Signed-off-by: default avatarVeera Vegivada <vvegivad@codeaurora.org>
parent 5ecd48ae

drivers/clk/qcom/gcc-sdmshrike.c

+4 −0
Original line number Diff line number Diff line
@@ -5126,6 +5126,10 @@ static const struct qcom_reset_map gcc_sdmshrike_resets[] = { 
	[GCC_VIDEO_AXIC_CLK_BCR] = { 0xb02c, 2 },

	[GCC_VIDEO_AXI0_CLK_BCR] = { 0xb024, 2 },

	[GCC_VIDEO_AXI1_CLK_BCR] = { 0xb028, 2 },

	[GCC_USB3_UNIPHY_MP0_BCR] = { 0x50024 },

	[GCC_USB3_UNIPHY_MP1_BCR] = { 0x50028 },

	[GCC_USB3UNIPHY_PHY_MP0_BCR] = { 0x5002c },

	[GCC_USB3UNIPHY_PHY_MP1_BCR] = { 0x50030 },

};

include/dt-bindings/clock/qcom,gcc-sdmshrike.h

+4 −0
Original line number Diff line number Diff line
@@ -308,6 +308,10 @@ 
#define GCC_VIDEO_AXIC_CLK_BCR				41

#define GCC_VIDEO_AXI0_CLK_BCR				42

#define GCC_VIDEO_AXI1_CLK_BCR				43

#define GCC_USB3_UNIPHY_MP0_BCR			44

#define GCC_USB3_UNIPHY_MP1_BCR			45

#define GCC_USB3UNIPHY_PHY_MP0_BCR			46

#define GCC_USB3UNIPHY_PHY_MP1_BCR			47



/* Dummy clocks for rate measurement */

#define MEASURE_ONLY_SNOC_CLK				0