Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8870cb9e authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add svsl1 level for CSID clock in atoll"

parents f3d6a7c5 4853cd4f

arch/arm64/boot/dts/qcom/atoll-camera.dtsi

+6 −3
Original line number Diff line number Diff line
@@ -899,8 +899,9 @@ 
			<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;

		clock-rates =

			<0 0 0 0 0 0 270000000 0 0 0 360000000 0 0>,

			<0 0 0 0 0 0 360000000 0 0 0 432000000 0 0>,

			<0 0 0 0 0 0 480000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		ppi-enable;

		status = "ok";
@@ -987,8 +988,9 @@ 
			<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;

		clock-rates =

			<0 0 0 0 0 0 270000000 0 0 0 360000000 0 0>,

			<0 0 0 0 0 0 360000000 0 0 0 432000000 0 0>,

			<0 0 0 0 0 0 480000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		ppi-enable;

		status = "ok";
@@ -1072,8 +1074,9 @@ 
			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;

		clock-rates =

			<0 0 0 0 0 0 270000000 0 0 0 360000000 0>,

			<0 0 0 0 0 0 360000000 0 0 0 432000000 0>,

			<0 0 0 0 0 0 480000000 0 0 0 600000000 0>;

		clock-cntl-level = "svs", "turbo";

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		ppi-enable;

		status = "ok";