Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 86b1c09b authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: Add support for multiple PLL software instances 



There could be use cases where the PLL could support various software
instances for various peripherals or for cpu. In those cases PLL need to
support aggregation logic for the voting and devoting on the PLL.

Change-Id: Ie5148a75452dccc555989a454996b945956f94e5
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 2ef56f0e

drivers/clk/qcom/clk-alpha-pll.c

+11 −2
Original line number Diff line number Diff line
@@ -352,7 +352,11 @@ static int clk_alpha_pll_enable(struct clk_hw *hw) 
		ret = clk_enable_regmap(hw);

		if (ret)

			return ret;

		return wait_for_pll_enable_active(pll);

		ret = wait_for_pll_enable_active(pll);

		if (ret == 0)

			if (pll->flags & SUPPORTS_FSM_VOTE)

				*pll->soft_vote |= (pll->soft_vote_mask);

		return ret;

	}



	/* Skip if already enabled */
@@ -402,6 +406,11 @@ static void clk_alpha_pll_disable(struct clk_hw *hw) 


	/* If in FSM mode, just unvote it */

	if (val & PLL_VOTE_FSM_ENA) {

		if (pll->flags & SUPPORTS_FSM_VOTE) {

			*pll->soft_vote &= ~(pll->soft_vote_mask);

			if (!*pll->soft_vote)

				clk_disable_regmap(hw);

		} else

			clk_disable_regmap(hw);

		return;

	}

drivers/clk/qcom/clk-alpha-pll.h

+11 −0
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@ enum pll_type { 
/**

 * struct clk_alpha_pll - phase locked loop (PLL)

 * @offset: base address of registers

 * @soft_vote: soft voting variable for multiple PLL software instances

 * @soft_vote_mask: soft voting mask for multiple PLL software instances

 * @inited: flag that's set when the PLL is initialized

 * @vco_table: array of VCO settings

 * @vco_data: array of VCO data settings like post div
@@ -47,6 +49,13 @@ struct clk_alpha_pll { 
	struct alpha_pll_config *config;

	bool inited;



	u32 *soft_vote;

	u32 soft_vote_mask;

	/* Soft voting values */

#define PLL_SOFT_VOTE_PRIMARY	BIT(0)

#define PLL_SOFT_VOTE_CPU	BIT(1)

#define PLL_SOFT_VOTE_AUX	BIT(2)



	const struct pll_vco *vco_table;

	size_t num_vco;
@@ -62,6 +71,8 @@ struct clk_alpha_pll { 
	 */

#define SUPPORTS_DYNAMIC_UPDATE	BIT(3)

#define SUPPORTS_SLEW		BIT(4)

	/* Associated with soft_vote for multiple PLL software instances */

#define SUPPORTS_FSM_VOTE	BIT(5)

	u8 flags;



	struct clk_regmap clkr;