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Commit 84f880ac authored by Ayush Kumar's avatar Ayush Kumar
Browse files

msm: camera: isp: Reset IFE hardware before active and wait list flush



In flush all, Ife hardware need to reset before flushing active and
wait list to prevent any unwanted memory access.

Change-Id: I1778fbe13bab414c37d0f7e3f883c6b66c4e20a9
Signed-off-by: default avatarAyush Kumar <ayushkr@codeaurora.org>
parent e71c354c
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+8 −8
Original line number Diff line number Diff line
@@ -2094,6 +2094,14 @@ static int __cam_isp_ctx_flush_req_in_top_state(
		ctx->hw_mgr_intf->hw_stop(ctx->hw_mgr_intf->hw_mgr_priv,
				&stop_args);

		CAM_DBG(CAM_ISP, "try to reset hw");
		/* Reset hw */
		reset_args.ctxt_to_hw_map = ctx_isp->hw_ctx;
		rc = ctx->hw_mgr_intf->hw_reset(ctx->hw_mgr_intf->hw_mgr_priv,
			&reset_args);
		if (rc)
			goto end;

		spin_lock_bh(&ctx->lock);
		CAM_DBG(CAM_ISP, "try to flush wait list");
		rc = __cam_isp_ctx_flush_req(ctx, &ctx->wait_req_list,
@@ -2104,14 +2112,6 @@ static int __cam_isp_ctx_flush_req_in_top_state(
		ctx_isp->active_req_cnt = 0;
		spin_unlock_bh(&ctx->lock);

		CAM_DBG(CAM_ISP, "try to reset hw");
		/* Reset hw */
		reset_args.ctxt_to_hw_map = ctx_isp->hw_ctx;
		rc = ctx->hw_mgr_intf->hw_reset(ctx->hw_mgr_intf->hw_mgr_priv,
			&reset_args);
		if (rc)
			goto end;

		CAM_DBG(CAM_ISP, "ctx id%d try to start hw", ctx->ctx_id);
		/* Start hw */
		start_isp.hw_config.ctxt_to_hw_map = ctx_isp->hw_ctx;