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Commit 8157ee21 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'v3.10' into drm-intel-fixes



Backmerge Linux 3.10 to get at

commit 19b2dbde
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Jun 12 10:15:12 2013 +0100

    drm/i915: Restore fences after resume and GPU resets

That commit is not in my current -fixes pile since that's based on my
-next queue for 3.11. And the above mentioned fix was merged really
late into 3.10 (and blew up, bad me) so was on a diverging branch.

Option B would have been to rebase my current pile of fixes onto
Dave's drm-fixes branch. But since some of the patches here are a bit
tricky I've decided not to void all the testing by moving over the
entire merge window.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parents 2e57f47d 8bb495e3
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+2 −2
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@@ -420,10 +420,10 @@ tcp_synack_retries - INTEGER
	for a passive TCP connection will happen after 63seconds.

tcp_syncookies - BOOLEAN
	Only valid when the kernel was compiled with CONFIG_SYNCOOKIES
	Only valid when the kernel was compiled with CONFIG_SYN_COOKIES
	Send out syncookies when the syn backlog queue of a socket
	overflows. This is to prevent against the common 'SYN flood attack'
	Default: FALSE
	Default: 1

	Note, that syncookies is fallback facility.
	It MUST NOT be used to help highly loaded servers to stand
+1 −1
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@@ -3222,7 +3222,7 @@ F: lib/fault-inject.c

FCOE SUBSYSTEM (libfc, libfcoe, fcoe)
M:	Robert Love <robert.w.love@intel.com>
L:	devel@open-fcoe.org
L:	fcoe-devel@open-fcoe.org
W:	www.Open-FCoE.org
S:	Supported
F:	drivers/scsi/libfc/
+1 −1
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VERSION = 3
PATCHLEVEL = 10
SUBLEVEL = 0
EXTRAVERSION = -rc7
EXTRAVERSION =
NAME = Unicycling Gorilla

# *DOCUMENTATION*
+14 −0
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@@ -1087,6 +1087,20 @@ if !MMU
source "arch/arm/Kconfig-nommu"
endif

config PJ4B_ERRATA_4742
	bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
	depends on CPU_PJ4B && MACH_ARMADA_370
	default y
	help
	  When coming out of either a Wait for Interrupt (WFI) or a Wait for
	  Event (WFE) IDLE states, a specific timing sensitivity exists between
	  the retiring WFI/WFE instructions and the newly issued subsequent
	  instructions.  This sensitivity can result in a CPU hang scenario.
	  Workaround:
	  The software must insert either a Data Synchronization Barrier (DSB)
	  or Data Memory Barrier (DMB) command immediately after the WFI/WFE
	  instruction

config ARM_ERRATA_326103
	bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
	depends on CPU_V6
+2 −0
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@@ -32,6 +32,8 @@

#define MPIDR_HWID_BITMASK 0xFFFFFF

#define MPIDR_INVALID (~MPIDR_HWID_BITMASK)

#define MPIDR_LEVEL_BITS 8
#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)

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