Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7ec9f34a authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARC: [dts] Introduce Timer bindings



ARC Timers have historically been probed directly.
As precursor to start probing Timers thru DT introduce these bindings
Note that to keep series bisectable, these bindings are not yet used in
code.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: devicetree@vger.kernel.org
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent b3d6aba8
Loading
Loading
Loading
Loading
+31 −0
Original line number Original line Diff line number Diff line
Synopsys ARC Local Timer with Interrupt Capabilities
- Found on all ARC CPUs (ARC700/ARCHS)
- Can be optionally programmed to interrupt on Limit
- Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically
  TIMER0 used as clockevent provider (true for all ARC cores)
  TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)

Required properties:

- compatible : should be "snps,arc-timer"
- interrupts : single Interrupt going into parent intc
	       (16 for ARCHS cores, 3 for ARC700 cores)
- clocks     : phandle to the source clock

Optional properties:

- interrupt-parent : phandle to parent intc

Example:

	timer0 {
		compatible = "snps,arc-timer";
		interrupts = <3>;
		interrupt-parent = <&core_intc>;
		clocks = <&core_clk>;
	};

	timer1 {
		compatible = "snps,arc-timer";
		clocks = <&core_clk>;
	};
+14 −0
Original line number Original line Diff line number Diff line
Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
- clocksource provider for SMP SoC

Required properties:

- compatible : should be "snps,archs-gfrc"
- clocks     : phandle to the source clock

Example:

	gfrc {
		compatible = "snps,archs-gfrc";
		clocks = <&core_clk>;
	};
+14 −0
Original line number Original line Diff line number Diff line
Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
- clocksource provider for UP SoC

Required properties:

- compatible : should be "snps,archs-rtc"
- clocks     : phandle to the source clock

Example:

	rtc {
		compatible = "snps,arc-rtc";
		clocks = <&core_clk>;
	};
+14 −0
Original line number Original line Diff line number Diff line
@@ -35,6 +35,20 @@
		};
		};
	};
	};


	/* TIMER0 with interrupt for clockevent */
	timer0 {
		compatible = "snps,arc-timer";
		interrupts = <3>;
		interrupt-parent = <&intc>;
		clocks = <&cpu_clk>;
	};

	/* TIMER1 for free running clocksource */
	timer1 {
		compatible = "snps,arc-timer";
		clocks = <&cpu_clk>;
	};

	soc100 {
	soc100 {
		#address-cells	= <1>;
		#address-cells	= <1>;
		#size-cells	= <1>;
		#size-cells	= <1>;
+14 −0
Original line number Original line Diff line number Diff line
@@ -30,6 +30,20 @@
		};
		};
	};
	};


	/* TIMER0 with interrupt for clockevent */
	timer0 {
		compatible = "snps,arc-timer";
		interrupts = <3>;
		interrupt-parent = <&core_intc>;
		clocks = <&core_clk>;
	};

	/* TIMER1 for free running clocksource */
	timer1 {
		compatible = "snps,arc-timer";
		clocks = <&core_clk>;
	};

	memory {
	memory {
		device_type = "memory";
		device_type = "memory";
		reg = <0x80000000 0x10000000>;	/* 256M */
		reg = <0x80000000 0x10000000>;	/* 256M */
Loading