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Commit 7a75626b authored by Rishabh Jain's avatar Rishabh Jain
Browse files

msm: camera: isp: Enable pixel_format_measurement in CSID 



Enabling format measure helps to find mismatch between
the expected sensor width and height with actual sensor width
and height.
In case of mismatch CSID will give CSID_PATH_ERROR_PIX_COUNT
and CSID_PATH_ERROR_LINE_COUNT.

Change-Id: I11aefe7d073ec47810564442109981d0e46f9844
Signed-off-by: default avatarRishabh Jain <risjai@codeaurora.org>
parent 71e62c89

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

+89 −6
Original line number Diff line number Diff line
@@ -3528,6 +3528,75 @@ static int cam_isp_blob_clock_update( 
	return rc;

}



static int cam_isp_blob_sensor_config(

	uint32_t                               blob_type,

	struct cam_isp_generic_blob_info      *blob_info,

	struct cam_isp_sensor_config          *dim_config,

	struct cam_hw_prepare_update_args     *prepare)

{

	struct cam_ife_hw_mgr_ctx                   *ctx = NULL;

	struct cam_ife_hw_mgr_res                   *hw_mgr_res;

	struct cam_hw_intf                          *hw_intf;

	struct cam_ife_sensor_dimension_update_args  update_args;

	int                                          rc = -EINVAL, found = 0;

	uint32_t                                     i, j;

	struct cam_isp_sensor_dimension             *path_config;



	ctx = prepare->ctxt_to_hw_map;



	list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_csid, list) {

		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {

			if (!hw_mgr_res->hw_res[i])

				continue;

			found = 1;

			hw_intf = hw_mgr_res->hw_res[i]->hw_intf;

			if (hw_intf && hw_intf->hw_ops.process_cmd) {

				path_config = &(dim_config->ipp_path);

				update_args.ipp_path.width =

					path_config->width;

				update_args.ipp_path.height =

					path_config->height;

				update_args.ipp_path.measure_enabled =

					path_config->measure_enabled;

				path_config = &(dim_config->ppp_path);

				update_args.ppp_path.width =

					path_config->width;

				update_args.ppp_path.height =

					path_config->height;

				update_args.ppp_path.measure_enabled =

					path_config->measure_enabled;

				for (j = 0; j < CAM_IFE_RDI_NUM_MAX; j++) {

					path_config =

						&(dim_config->rdi_path[j]);

					update_args.rdi_path[j].width =

						path_config->width;

					update_args.rdi_path[j].height =

						path_config->height;

				update_args.rdi_path[j].measure_enabled =

						path_config->measure_enabled;

				}

				rc = hw_intf->hw_ops.process_cmd(

					hw_intf->hw_priv,

					CAM_IFE_CSID_SET_SENSOR_DIMENSION_CFG,

					&update_args,

					sizeof(

					struct

					cam_ife_sensor_dimension_update_args)

					);

				if (rc)

					CAM_ERR(CAM_ISP,

						"Dimension Update failed");

			} else

				CAM_ERR(CAM_ISP, "hw_intf is NULL");

		}

		if (found)

			break;

	}



	return rc;

}





void fill_res_bitmap(uint32_t resource_type, unsigned long *res_bitmap)

{
@@ -3620,12 +3689,6 @@ static int cam_isp_packet_generic_blob_handler(void *user_data, 
		return -EINVAL;

	}



	if (blob_type >= CAM_ISP_GENERIC_BLOB_TYPE_MAX) {

		CAM_WARN(CAM_ISP, "Invalid Blob Type %d Max %d", blob_type,

			CAM_ISP_GENERIC_BLOB_TYPE_MAX);

		return 0;

	}



	prepare = blob_info->prepare;

	if (!prepare) {

		CAM_ERR(CAM_ISP, "Failed. prepare is NULL, blob_type %d",
@@ -3868,6 +3931,26 @@ static int cam_isp_packet_generic_blob_handler(void *user_data, 
			CAM_ERR(CAM_ISP, "Init Frame drop Update Failed");

	}

		break;

	case CAM_ISP_GENERIC_BLOB_TYPE_SENSOR_DIMENSION_CONFIG: {

		struct cam_isp_sensor_config *csid_dim_config;



		if (blob_size < sizeof(struct cam_isp_sensor_config)) {

			CAM_ERR(CAM_ISP, "Invalid blob size %u expected %u",

				blob_size,

				sizeof(struct cam_isp_sensor_config));

			return -EINVAL;

		}



		csid_dim_config =

			(struct cam_isp_sensor_config *)blob_data;



		rc = cam_isp_blob_sensor_config(blob_type, blob_info,

			csid_dim_config, prepare);

		if (rc)

			CAM_ERR(CAM_ISP,

				"Sensor Dimension Update Failed rc: %d", rc);

	}

		break;

	default:

		CAM_WARN(CAM_ISP, "Invalid blob type %d", blob_type);

		break;

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid170.h

+5 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -293,6 +293,10 @@ static struct cam_ife_csid_common_reg_offset 
	.ppp_irq_mask_all                             = 0x0,

	.measure_en_hbi_vbi_cnt_mask                  = 0xC,

	.format_measure_en_val                        = 1,

	.format_measure_height_mask_val               = 0xFFFF,

	.format_measure_height_shift_val              = 0x10,

	.format_measure_width_mask_val                = 0xFFFF,

	.format_measure_width_shift_val               = 0x0,

};



static struct cam_ife_csid_reg_offset cam_ife_csid_170_reg_offset = {

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid175.h

+5 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -334,6 +334,10 @@ static struct cam_ife_csid_common_reg_offset 
	.ppp_irq_mask_all                             = 0xFFFF,

	.measure_en_hbi_vbi_cnt_mask                  = 0xC,

	.format_measure_en_val                        = 1,

	.format_measure_height_mask_val               = 0xFFFF,

	.format_measure_height_shift_val              = 0x10,

	.format_measure_width_mask_val                = 0xFFFF,

	.format_measure_width_shift_val               = 0x0,

};



static struct cam_ife_csid_reg_offset cam_ife_csid_175_reg_offset = {

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid175_200.h

+5 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -350,6 +350,10 @@ static struct cam_ife_csid_common_reg_offset 
	.ppp_irq_mask_all                             = 0xFFFF,

	.measure_en_hbi_vbi_cnt_mask                  = 0xC,

	.format_measure_en_val                        = 1,

	.format_measure_height_mask_val               = 0xFFFF,

	.format_measure_height_shift_val              = 0x10,

	.format_measure_width_mask_val                = 0xFFFF,

	.format_measure_width_shift_val               = 0x0,

};



static struct cam_ife_csid_reg_offset cam_ife_csid_175_200_reg_offset = {

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c

+202 −4
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ static int cam_ife_csid_is_ipp_ppp_format_supported( 


static int cam_ife_csid_get_format_rdi(

	uint32_t in_format, uint32_t out_format,

	uint32_t *decode_fmt, uint32_t *plain_fmt)

	uint32_t *decode_fmt, uint32_t *plain_fmt, uint32_t *in_bpp)

{

	int rc = 0;
@@ -96,6 +96,7 @@ static int cam_ife_csid_get_format_rdi( 
			rc = -EINVAL;

			break;

		}

		*in_bpp = 6;

		break;

	case CAM_FORMAT_MIPI_RAW_8:

		switch (out_format) {
@@ -111,6 +112,7 @@ static int cam_ife_csid_get_format_rdi( 
			rc = -EINVAL;

			break;

		}

		*in_bpp = 8;

		break;

	case CAM_FORMAT_MIPI_RAW_10:

		switch (out_format) {
@@ -126,6 +128,7 @@ static int cam_ife_csid_get_format_rdi( 
			rc = -EINVAL;

			break;

		}

		*in_bpp = 10;

		break;

	case CAM_FORMAT_MIPI_RAW_12:

		switch (out_format) {
@@ -140,6 +143,7 @@ static int cam_ife_csid_get_format_rdi( 
			rc = -EINVAL;

			break;

		}

		*in_bpp = 12;

		break;

	case CAM_FORMAT_MIPI_RAW_14:

		switch (out_format) {
@@ -154,6 +158,7 @@ static int cam_ife_csid_get_format_rdi( 
			rc = -EINVAL;

			break;

		}

		*in_bpp = 14;

		break;

	case CAM_FORMAT_MIPI_RAW_16:

		switch (out_format) {
@@ -168,6 +173,7 @@ static int cam_ife_csid_get_format_rdi( 
			rc = -EINVAL;

			break;

		}

		*in_bpp = 16;

		break;

	case CAM_FORMAT_MIPI_RAW_20:

		switch (out_format) {
@@ -182,6 +188,7 @@ static int cam_ife_csid_get_format_rdi( 
			rc = -EINVAL;

			break;

		}

		*in_bpp = 20;

		break;

	case CAM_FORMAT_DPCM_10_6_10:

		*decode_fmt  = 0x7;
@@ -1167,6 +1174,11 @@ static int cam_ife_csid_disable_hw(struct cam_ife_csid_hw *csid_hw) 
	for (i = 0; i < CAM_IFE_PIX_PATH_RES_MAX; i++)

		csid_hw->res_sof_cnt[i] = 0;



	csid_hw->ipp_path_config.measure_enabled = 0;

	csid_hw->ppp_path_config.measure_enabled = 0;

	for (i = 0; i <= CAM_IFE_PIX_PATH_RES_RDI_3; i++)

		csid_hw->rdi_path_config[i].measure_enabled = 0;



	csid_hw->hw_info->hw_state = CAM_HW_STATE_POWER_DOWN;

	csid_hw->error_irq_count = 0;

	csid_hw->first_sof_ts = 0;
@@ -1590,6 +1602,7 @@ static int cam_ife_csid_init_config_pxl_path( 
	const struct cam_ife_csid_pxl_reg_offset *pxl_reg = NULL;

	bool                                      is_ipp;

	uint32_t decode_format = 0, plain_format = 0, val = 0;

	struct cam_isp_sensor_dimension  *path_config;



	path_data = (struct cam_ife_csid_path_cfg  *) res->res_priv;

	csid_reg = csid_hw->csid_info->csid_reg;
@@ -1598,9 +1611,11 @@ static int cam_ife_csid_init_config_pxl_path( 
	if (res->res_id == CAM_IFE_PIX_PATH_RES_IPP) {

		is_ipp = true;

		pxl_reg = csid_reg->ipp_reg;

		path_config = &(csid_hw->ipp_path_config);

	} else {

		is_ipp = false;

		pxl_reg = csid_reg->ppp_reg;

		path_config = &(csid_hw->ppp_path_config);

	}



	if (!pxl_reg) {
@@ -1669,6 +1684,24 @@ static int cam_ife_csid_init_config_pxl_path( 
		}

	}



	/* configure pixel format measure */

	if (path_config->measure_enabled) {

		val = (((path_config->height  &

			csid_reg->cmn_reg->format_measure_height_mask_val) <<

			csid_reg->cmn_reg->format_measure_height_shift_val) |

			(path_config->width &

			csid_reg->cmn_reg->format_measure_width_mask_val));

		CAM_DBG(CAM_ISP, "CSID:%d format measure cfg1 value : 0x%x",

			csid_hw->hw_intf->hw_idx, val);



		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +

			pxl_reg->csid_pxl_format_measure_cfg1_addr);



		/* enable pixel and line counter */

		cam_io_w_mb(3, soc_info->reg_map[0].mem_base +

			pxl_reg->csid_pxl_format_measure_cfg0_addr);

	}



	/* set frame drop pattern to 0 and period to 1 */

	cam_io_w_mb(1, soc_info->reg_map[0].mem_base +

		pxl_reg->csid_pxl_frm_drop_period_addr);
@@ -1814,6 +1847,7 @@ static int cam_ife_csid_enable_pxl_path( 
	const struct cam_ife_csid_pxl_reg_offset *pxl_reg = NULL;

	bool                                      is_ipp;

	uint32_t                                  val = 0, path_status;

	struct cam_isp_sensor_dimension  *path_config;



	path_data = (struct cam_ife_csid_path_cfg   *) res->res_priv;

	csid_reg = csid_hw->csid_info->csid_reg;
@@ -1822,9 +1856,11 @@ static int cam_ife_csid_enable_pxl_path( 
	if (res->res_id == CAM_IFE_PIX_PATH_RES_IPP) {

		is_ipp = true;

		pxl_reg = csid_reg->ipp_reg;

		path_config = &(csid_hw->ipp_path_config);

	} else {

		is_ipp = false;

		pxl_reg = csid_reg->ppp_reg;

		path_config = &(csid_hw->ppp_path_config);

	}



	if (res->res_state != CAM_ISP_RESOURCE_STATE_INIT_HW) {
@@ -1885,6 +1921,10 @@ static int cam_ife_csid_enable_pxl_path( 
	if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_EOF_IRQ)

		val |= CSID_PATH_INFO_INPUT_EOF;



	if (path_config->measure_enabled)

		val |= (CSID_PATH_ERROR_PIX_COUNT |

			CSID_PATH_ERROR_LINE_COUNT);



	cam_io_w_mb(val, soc_info->reg_map[0].mem_base +

		pxl_reg->csid_pxl_irq_mask_addr);
@@ -1985,7 +2025,7 @@ static int cam_ife_csid_init_config_rdi_path( 
	struct cam_ife_csid_path_cfg           *path_data;

	const struct cam_ife_csid_reg_offset   *csid_reg;

	struct cam_hw_soc_info                 *soc_info;

	uint32_t path_format = 0, plain_fmt = 0, val = 0, id;

	uint32_t path_format = 0, plain_fmt = 0, val = 0, id, in_bpp = 0;

	uint32_t format_measure_addr;



	path_data = (struct cam_ife_csid_path_cfg   *) res->res_priv;
@@ -2000,7 +2040,7 @@ static int cam_ife_csid_init_config_rdi_path( 
	}



	rc = cam_ife_csid_get_format_rdi(path_data->in_format,

		path_data->out_format, &path_format, &plain_fmt);

		path_data->out_format, &path_format, &plain_fmt, &in_bpp);

	if (rc)

		return rc;
@@ -2049,6 +2089,32 @@ static int cam_ife_csid_init_config_rdi_path( 
		CAM_DBG(CAM_ISP, "CSID:%d Vertical Crop config val: 0x%x",

			csid_hw->hw_intf->hw_idx, val);

	}



	/* configure pixel format measure */

	if (csid_hw->rdi_path_config[id].measure_enabled) {

		val = ((csid_hw->rdi_path_config[id].height &

		csid_reg->cmn_reg->format_measure_height_mask_val) <<

		csid_reg->cmn_reg->format_measure_height_shift_val);



		if (path_format == 0xF)

			val |= (((csid_hw->rdi_path_config[id].width *

				in_bpp) / 8) &

			csid_reg->cmn_reg->format_measure_width_mask_val);

		else

			val |= (csid_hw->rdi_path_config[id].width &

			csid_reg->cmn_reg->format_measure_width_mask_val);



		CAM_DBG(CAM_ISP, "CSID:%d format measure cfg1 value : 0x%x",

			csid_hw->hw_intf->hw_idx, val);



		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +

		csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg1_addr);



		/* enable pixel and line counter */

		cam_io_w_mb(3, soc_info->reg_map[0].mem_base +

		csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg0_addr);

	}



	/* set frame drop pattern to 0 and period to 1 */

	cam_io_w_mb(1, soc_info->reg_map[0].mem_base +

		csid_reg->rdi_reg[id]->csid_rdi_frm_drop_period_addr);
@@ -2221,6 +2287,10 @@ static int cam_ife_csid_enable_rdi_path( 
	if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_EOF_IRQ)

		val |= CSID_PATH_INFO_INPUT_EOF;



	if (csid_hw->rdi_path_config[id].measure_enabled)

		val |= (CSID_PATH_ERROR_PIX_COUNT |

			CSID_PATH_ERROR_LINE_COUNT);



	cam_io_w_mb(val, soc_info->reg_map[0].mem_base +

		csid_reg->rdi_reg[id]->csid_rdi_irq_mask_addr);
@@ -2674,6 +2744,13 @@ static int cam_ife_csid_release(void *hw_priv, 
	case CAM_ISP_RESOURCE_PIX_PATH:

		res->res_state = CAM_ISP_RESOURCE_STATE_AVAILABLE;

		cam_ife_csid_reset_init_frame_drop(csid_hw);

		if (res->res_id == CAM_IFE_PIX_PATH_RES_IPP)

			csid_hw->ipp_path_config.measure_enabled = 0;

		else if (res->res_id == CAM_IFE_PIX_PATH_RES_PPP)

			csid_hw->ppp_path_config.measure_enabled = 0;

		else

			csid_hw->rdi_path_config[res->res_id].measure_enabled

				= 0;

		break;

	default:

		CAM_ERR(CAM_ISP, "CSID:%d Invalid res type:%d res id%d",
@@ -3105,6 +3182,57 @@ static int cam_ife_csid_set_csid_clock( 
	return 0;

}



static int cam_ife_csid_set_sensor_dimension(

	struct cam_ife_csid_hw *csid_hw, void *cmd_args)

{

	struct cam_ife_sensor_dimension_update_args *dimension_update = NULL;

	uint32_t i;



	if (!csid_hw)

		return -EINVAL;



	dimension_update =

		(struct cam_ife_sensor_dimension_update_args *)cmd_args;

	csid_hw->ipp_path_config.measure_enabled =

		dimension_update->ipp_path.measure_enabled;

	if (dimension_update->ipp_path.measure_enabled) {

		csid_hw->ipp_path_config.width  =

			dimension_update->ipp_path.width;

		csid_hw->ipp_path_config.height =

			dimension_update->ipp_path.height;

		CAM_DBG(CAM_ISP, "CSID ipp path width %d height %d",

			csid_hw->ipp_path_config.width,

			csid_hw->ipp_path_config.height);

	}

	csid_hw->ppp_path_config.measure_enabled =

		dimension_update->ppp_path.measure_enabled;

	if (dimension_update->ppp_path.measure_enabled) {

		csid_hw->ppp_path_config.width  =

			dimension_update->ppp_path.width;

		csid_hw->ppp_path_config.height =

			dimension_update->ppp_path.height;

		CAM_DBG(CAM_ISP, "CSID ppp path width %d height %d",

			csid_hw->ppp_path_config.width,

			csid_hw->ppp_path_config.height);

	}

	for (i = 0; i <= CAM_IFE_PIX_PATH_RES_RDI_3; i++) {

		csid_hw->rdi_path_config[i].measure_enabled

			= dimension_update->rdi_path[i].measure_enabled;

		if (csid_hw->rdi_path_config[i].measure_enabled) {

			csid_hw->rdi_path_config[i].width =

				dimension_update->rdi_path[i].width;

			csid_hw->rdi_path_config[i].height =

				dimension_update->rdi_path[i].height;

			CAM_DBG(CAM_ISP,

				"CSID rdi path[%d] width %d height %d",

				i, csid_hw->rdi_path_config[i].width,

				csid_hw->rdi_path_config[i].height);

		}

	}



	return 0;

}



static int cam_ife_csid_process_cmd(void *hw_priv,

	uint32_t cmd_type, void *cmd_args, uint32_t arg_size)

{
@@ -3142,6 +3270,9 @@ static int cam_ife_csid_process_cmd(void *hw_priv, 
	case CAM_IFE_CSID_SET_INIT_FRAME_DROP:

		rc = cam_ife_csid_set_init_frame_drop(csid_hw, cmd_args);

		break;

	case CAM_IFE_CSID_SET_SENSOR_DIMENSION_CFG:

		rc = cam_ife_csid_set_sensor_dimension(csid_hw, cmd_args);

		break;

	default:

		CAM_ERR(CAM_ISP, "CSID:%d unsupported cmd:%d",

			csid_hw->hw_intf->hw_idx, cmd_type);
@@ -3164,7 +3295,7 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) 
	const struct cam_ife_csid_rdi_reg_offset       *rdi_reg;

	uint32_t i, irq_status_top, irq_status_rx, irq_status_ipp = 0;

	uint32_t irq_status_rdi[4] = {0, 0, 0, 0};

	uint32_t val, irq_status_ppp = 0;

	uint32_t val, val2, irq_status_ppp = 0;

	bool fatal_err_detected = false;

	uint32_t sof_irq_debug_en = 0;

	unsigned long flags;
@@ -3457,6 +3588,25 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) 
					csid_reg->ipp_reg->csid_pxl_ctrl_addr);

			}

		}



		if ((irq_status_ipp & CSID_PATH_ERROR_PIX_COUNT) ||

			(irq_status_ipp & CSID_PATH_ERROR_LINE_COUNT)) {

			val = cam_io_r_mb(soc_info->reg_map[0].mem_base +

			csid_reg->ipp_reg->csid_pxl_format_measure0_addr);



			CAM_ERR(CAM_ISP,

				"CSID:%d irq_status_ipp:0x%x",

				csid_hw->hw_intf->hw_idx, irq_status_ipp);

			CAM_ERR(CAM_ISP,

			"Expected sz 0x%x*0x%x actual sz 0x%x*0x%x",

			csid_hw->ipp_path_config.height,

			csid_hw->ipp_path_config.width,

			((val >>

			csid_reg->cmn_reg->format_measure_height_shift_val) &

			csid_reg->cmn_reg->format_measure_height_mask_val),

			val &

			csid_reg->cmn_reg->format_measure_width_mask_val);

		}

	}



	/*read PPP errors */
@@ -3538,6 +3688,25 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) 
					csid_reg->ppp_reg->csid_pxl_ctrl_addr);

			}

		}



		if ((irq_status_ppp & CSID_PATH_ERROR_PIX_COUNT) ||

			(irq_status_ppp & CSID_PATH_ERROR_LINE_COUNT)) {

			val = cam_io_r_mb(soc_info->reg_map[0].mem_base +

			csid_reg->ppp_reg->csid_pxl_format_measure0_addr);



			CAM_ERR(CAM_ISP,

				"CSID:%d irq_status_ppp:0x%x",

				csid_hw->hw_intf->hw_idx, irq_status_ppp);

			CAM_ERR(CAM_ISP,

			"Expected sz 0x%x*0x%x actual sz 0x%x*0x%x",

			csid_hw->ppp_path_config.height,

			csid_hw->ppp_path_config.width,

			((val >>

			csid_reg->cmn_reg->format_measure_height_shift_val) &

			csid_reg->cmn_reg->format_measure_height_mask_val),

			val &

			csid_reg->cmn_reg->format_measure_width_mask_val);

		}

	}



	for (i = 0; i < csid_reg->cmn_reg->num_rdis; i++) {
@@ -3604,6 +3773,31 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) 
				soc_info->reg_map[0].mem_base +

				csid_reg->rdi_reg[i]->csid_rdi_ctrl_addr);

		}



		if ((irq_status_rdi[i] & CSID_PATH_ERROR_PIX_COUNT) ||

			(irq_status_rdi[i] & CSID_PATH_ERROR_LINE_COUNT)) {

			val = cam_io_r_mb(soc_info->reg_map[0].mem_base +

			csid_reg->rdi_reg[i]->csid_rdi_format_measure0_addr);

			val2 = cam_io_r_mb(soc_info->reg_map[0].mem_base +

			csid_reg->rdi_reg[i]->csid_rdi_format_measure_cfg1_addr

			);

			CAM_ERR(CAM_ISP,

				"CSID:%d irq_status_rdi[%d]:0x%x",

				csid_hw->hw_intf->hw_idx, i,

				irq_status_rdi[i]);

			CAM_ERR(CAM_ISP,

			"Expected sz 0x%x*0x%x actual sz 0x%x*0x%x",

			((val2 >>

			csid_reg->cmn_reg->format_measure_height_shift_val) &

			csid_reg->cmn_reg->format_measure_height_mask_val),

			val2 &

			csid_reg->cmn_reg->format_measure_width_mask_val,

			((val >>

			csid_reg->cmn_reg->format_measure_height_shift_val) &

			csid_reg->cmn_reg->format_measure_height_mask_val),

			val &

			csid_reg->cmn_reg->format_measure_width_mask_val);

		}

	}



	if (csid_hw->irq_debug_cnt >= CAM_CSID_IRQ_SOF_DEBUG_CNT_MAX) {
@@ -3749,6 +3943,10 @@ int cam_ife_csid_hw_probe_init(struct cam_hw_intf *csid_hw_intf, 
	ife_csid_hw->csid_debug = 0;

	ife_csid_hw->error_irq_count = 0;

	ife_csid_hw->first_sof_ts = 0;

	ife_csid_hw->ipp_path_config.measure_enabled = 0;

	ife_csid_hw->ppp_path_config.measure_enabled = 0;

	for (i = 0; i <= CAM_IFE_PIX_PATH_RES_RDI_3; i++)

		ife_csid_hw->rdi_path_config[i].measure_enabled = 0;



	return 0;

err: