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Commit 733d1724 authored by Eric Miao's avatar Eric Miao Committed by Shawn Guo
Browse files

ARM: imx6q: resume PL310 only when CACHE_L2X0 defined 



Original patch from Lothar Waßmann, this patch fixes a building error
when CONFIG_CACHE_L2X0 is not defined.

Cc: Lothar Waßmann <lw@karo-electronics.de>
Signed-off-by: default avatarEric Miao <eric.miao@linaro.org>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 46ec1b26

arch/arm/mach-imx/head-v7.S

+9 −4
Original line number Original line Diff line number Diff line
@@ -80,6 +80,7 @@ ENDPROC(v7_secondary_startup) 
	.data

	.data

	.align

	.align





#ifdef CONFIG_CACHE_L2X0

	.macro	pl310_resume

	.macro	pl310_resume

	ldr	r2, phys_l2x0_saved_regs

	ldr	r2, phys_l2x0_saved_regs

	ldr	r0, [r2, #L2X0_R_PHY_BASE]	@ get physical base of l2x0

	ldr	r0, [r2, #L2X0_R_PHY_BASE]	@ get physical base of l2x0
@@ -89,13 +90,17 @@ ENDPROC(v7_secondary_startup) 
	str	r1, [r0, #L2X0_CTRL]		@ re-enable L2

	str	r1, [r0, #L2X0_CTRL]		@ re-enable L2

	.endm

	.endm





	.globl	phys_l2x0_saved_regs

phys_l2x0_saved_regs:

        .long   0

#else

	.macro	pl310_resume

	.endm

#endif



ENTRY(v7_cpu_resume)

ENTRY(v7_cpu_resume)

	bl	v7_invalidate_l1

	bl	v7_invalidate_l1

	pl310_resume

	pl310_resume

	b	cpu_resume

	b	cpu_resume

ENDPROC(v7_cpu_resume)

ENDPROC(v7_cpu_resume)



	.globl	phys_l2x0_saved_regs

phys_l2x0_saved_regs:

        .long   0

#endif
 
#endif

arch/arm/mach-imx/pm-imx6q.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -64,7 +64,9 @@ void __init imx6q_pm_init(void) 
	 * address of the data structure used by l2x0 core to save registers,

	 * address of the data structure used by l2x0 core to save registers,

	 * and later restore the necessary ones in imx6q resume entry.

	 * and later restore the necessary ones in imx6q resume entry.

	 */

	 */

#ifdef CONFIG_CACHE_L2X0

	phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);

	phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);

#endif





	suspend_set_ops(&imx6q_pm_ops);

	suspend_set_ops(&imx6q_pm_ops);

}
 
}