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Commit 71db5bfe authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi
Browse files

ARM: kernel: update topology to use new MPIDR macros 



This patch updates the topology initialization code to use the newly
defined accessors to retrieve the MPIDR affinity levels.

Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarWill Deacon <will.deacon@arm.com>
Acked-by: default avatarNicolas Pitre <nico@linaro.org>
parent dca463da

arch/arm/kernel/topology.c

+5 −10
Original line number Original line Diff line number Diff line
@@ -257,19 +257,14 @@ void store_cpu_topology(unsigned int cpuid) 




		if (mpidr & MPIDR_MT_BITMASK) {

		if (mpidr & MPIDR_MT_BITMASK) {

			/* core performance interdependency */

			/* core performance interdependency */

			cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT)

			cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);

				& MPIDR_LEVEL0_MASK;

			cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);

			cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT)

			cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);

				& MPIDR_LEVEL1_MASK;

			cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT)

				& MPIDR_LEVEL2_MASK;

		} else {

		} else {

			/* largely independent cores */

			/* largely independent cores */

			cpuid_topo->thread_id = -1;

			cpuid_topo->thread_id = -1;

			cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT)

			cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);

				& MPIDR_LEVEL0_MASK;

			cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);

			cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT)

				& MPIDR_LEVEL1_MASK;

		}

		}

	} else {

	} else {

		/*

		/*