Loading drivers/scsi/ufs/ufshcd.c +25 −12 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ * * This code is based on drivers/scsi/ufs/ufshcd.c * Copyright (C) 2011-2013 Samsung India Software Operations * Copyright (c) 2013-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2013-2021, The Linux Foundation. All rights reserved. * * Authors: * Santosh Yaraganavi <santosh.sy@samsung.com> Loading Loading @@ -10174,7 +10174,7 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) /* UFS device & link must be active before we enter in this function */ if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) goto set_vreg_lpm; goto disable_clks; if (ufshcd_is_runtime_pm(pm_op)) { if (ufshcd_can_autobkops_during_suspend(hba)) { Loading Loading @@ -10210,9 +10210,6 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) ufshcd_is_hibern8_on_idle_allowed(hba)) hba->hibern8_on_idle.state = HIBERN8_ENTERED; set_vreg_lpm: if (!hba->auto_bkops_enabled) ufshcd_vreg_set_lpm(hba); disable_clks: /* * Call vendor specific suspend callback. As these callbacks may access Loading @@ -10223,6 +10220,13 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) if (ret) goto set_link_active; /* reset the connected UFS device during power down */ if (ufshcd_is_link_off(hba)) { ret = ufshcd_assert_device_reset(hba); if (ret) goto set_link_active; } if (!ufshcd_is_link_active(hba)) ret = ufshcd_disable_clocks(hba, false); else Loading @@ -10244,6 +10248,12 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) * host controller transaction expected till resume. */ ufshcd_disable_irq(hba); if (!hba->auto_bkops_enabled || !(req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE && req_link_state == UIC_LINK_ACTIVE_STATE)) ufshcd_vreg_set_lpm(hba); /* Put the host controller in low power mode if possible */ ufshcd_hba_vreg_set_lpm(hba); goto out; Loading @@ -10256,6 +10266,7 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) ufshcd_set_link_active(hba); } else if (ufshcd_is_link_off(hba)) { ufshcd_update_error_stats(hba, UFS_ERR_VOPS_SUSPEND); ufshcd_deassert_device_reset(hba); ufshcd_host_reset_and_restore(hba); } set_dev_active: Loading Loading @@ -10298,17 +10309,19 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) old_pwr_mode = hba->curr_dev_pwr_mode; ufshcd_hba_vreg_set_hpm(hba); ret = ufshcd_vreg_set_hpm(hba); if (ret) goto out; /* Make sure clocks are enabled before accessing controller */ ret = ufshcd_enable_clocks(hba); if (ret) goto out; goto disable_vreg; /* enable the host irq as host controller would be active soon */ ufshcd_enable_irq(hba); ret = ufshcd_vreg_set_hpm(hba); if (ret) goto disable_irq_and_vops_clks; if (hba->restore) { /* Configure UTRL and UTMRL base address registers */ ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr), Loading @@ -10329,7 +10342,7 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) */ ret = ufshcd_vops_resume(hba, pm_op); if (ret) goto disable_vreg; goto disable_irq_and_vops_clks; if (hba->extcon && (ufshcd_is_card_offline(hba) || Loading Loading @@ -10406,8 +10419,6 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) hba->hibern8_on_idle.state = HIBERN8_ENTERED; vendor_suspend: ufshcd_vops_suspend(hba, pm_op); disable_vreg: ufshcd_vreg_set_lpm(hba); disable_irq_and_vops_clks: ufshcd_disable_irq(hba); if (hba->clk_scaling.is_allowed) Loading @@ -10415,6 +10426,8 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) ufshcd_disable_clocks(hba, false); if (ufshcd_is_clkgating_allowed(hba)) hba->clk_gating.state = CLKS_OFF; disable_vreg: ufshcd_vreg_set_lpm(hba); out: hba->pm_op_in_progress = 0; Loading Loading
drivers/scsi/ufs/ufshcd.c +25 −12 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ * * This code is based on drivers/scsi/ufs/ufshcd.c * Copyright (C) 2011-2013 Samsung India Software Operations * Copyright (c) 2013-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2013-2021, The Linux Foundation. All rights reserved. * * Authors: * Santosh Yaraganavi <santosh.sy@samsung.com> Loading Loading @@ -10174,7 +10174,7 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) /* UFS device & link must be active before we enter in this function */ if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) goto set_vreg_lpm; goto disable_clks; if (ufshcd_is_runtime_pm(pm_op)) { if (ufshcd_can_autobkops_during_suspend(hba)) { Loading Loading @@ -10210,9 +10210,6 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) ufshcd_is_hibern8_on_idle_allowed(hba)) hba->hibern8_on_idle.state = HIBERN8_ENTERED; set_vreg_lpm: if (!hba->auto_bkops_enabled) ufshcd_vreg_set_lpm(hba); disable_clks: /* * Call vendor specific suspend callback. As these callbacks may access Loading @@ -10223,6 +10220,13 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) if (ret) goto set_link_active; /* reset the connected UFS device during power down */ if (ufshcd_is_link_off(hba)) { ret = ufshcd_assert_device_reset(hba); if (ret) goto set_link_active; } if (!ufshcd_is_link_active(hba)) ret = ufshcd_disable_clocks(hba, false); else Loading @@ -10244,6 +10248,12 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) * host controller transaction expected till resume. */ ufshcd_disable_irq(hba); if (!hba->auto_bkops_enabled || !(req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE && req_link_state == UIC_LINK_ACTIVE_STATE)) ufshcd_vreg_set_lpm(hba); /* Put the host controller in low power mode if possible */ ufshcd_hba_vreg_set_lpm(hba); goto out; Loading @@ -10256,6 +10266,7 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) ufshcd_set_link_active(hba); } else if (ufshcd_is_link_off(hba)) { ufshcd_update_error_stats(hba, UFS_ERR_VOPS_SUSPEND); ufshcd_deassert_device_reset(hba); ufshcd_host_reset_and_restore(hba); } set_dev_active: Loading Loading @@ -10298,17 +10309,19 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) old_pwr_mode = hba->curr_dev_pwr_mode; ufshcd_hba_vreg_set_hpm(hba); ret = ufshcd_vreg_set_hpm(hba); if (ret) goto out; /* Make sure clocks are enabled before accessing controller */ ret = ufshcd_enable_clocks(hba); if (ret) goto out; goto disable_vreg; /* enable the host irq as host controller would be active soon */ ufshcd_enable_irq(hba); ret = ufshcd_vreg_set_hpm(hba); if (ret) goto disable_irq_and_vops_clks; if (hba->restore) { /* Configure UTRL and UTMRL base address registers */ ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr), Loading @@ -10329,7 +10342,7 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) */ ret = ufshcd_vops_resume(hba, pm_op); if (ret) goto disable_vreg; goto disable_irq_and_vops_clks; if (hba->extcon && (ufshcd_is_card_offline(hba) || Loading Loading @@ -10406,8 +10419,6 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) hba->hibern8_on_idle.state = HIBERN8_ENTERED; vendor_suspend: ufshcd_vops_suspend(hba, pm_op); disable_vreg: ufshcd_vreg_set_lpm(hba); disable_irq_and_vops_clks: ufshcd_disable_irq(hba); if (hba->clk_scaling.is_allowed) Loading @@ -10415,6 +10426,8 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) ufshcd_disable_clocks(hba, false); if (ufshcd_is_clkgating_allowed(hba)) hba->clk_gating.state = CLKS_OFF; disable_vreg: ufshcd_vreg_set_lpm(hba); out: hba->pm_op_in_progress = 0; Loading