Loading arch/arm64/boot/dts/qcom/sdm855-sde-display.dtsi +7 −6 Original line number Diff line number Diff line Loading @@ -432,6 +432,7 @@ connectors = <&sde_wb>; }; /* PHY TIMINGS REVISION P */ &dsi_dual_nt35597_truly_video { qcom,mdss-dsi-t-clk-post = <0x17>; qcom,mdss-dsi-t-clk-pre = <0x18>; Loading Loading @@ -461,12 +462,12 @@ }; &dsi_nt35597_truly_dsc_cmd { qcom,mdss-dsi-t-clk-post = <0x0b>; qcom,mdss-dsi-t-clk-pre = <0x23>; qcom,mdss-dsi-t-clk-post = <0x15>; qcom,mdss-dsi-t-clk-pre = <0x12>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 05 03 03 04 00]; 05 03 03 04 00 12 15]; qcom,display-topology = <1 1 1>, <2 2 1>, /* dsc merge */ <2 1 1>; /* 3d mux */ Loading @@ -476,12 +477,12 @@ }; &dsi_nt35597_truly_dsc_video { qcom,mdss-dsi-t-clk-post = <0x0b>; qcom,mdss-dsi-t-clk-pre = <0x23>; qcom,mdss-dsi-t-clk-post = <0x15>; qcom,mdss-dsi-t-clk-pre = <0x12>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 04 03 03 04 00]; 05 03 03 04 00 12 15]; qcom,display-topology = <1 1 1>, <2 2 1>, /* dsc merge */ <2 1 1>; /* 3d mux */ Loading Loading
arch/arm64/boot/dts/qcom/sdm855-sde-display.dtsi +7 −6 Original line number Diff line number Diff line Loading @@ -432,6 +432,7 @@ connectors = <&sde_wb>; }; /* PHY TIMINGS REVISION P */ &dsi_dual_nt35597_truly_video { qcom,mdss-dsi-t-clk-post = <0x17>; qcom,mdss-dsi-t-clk-pre = <0x18>; Loading Loading @@ -461,12 +462,12 @@ }; &dsi_nt35597_truly_dsc_cmd { qcom,mdss-dsi-t-clk-post = <0x0b>; qcom,mdss-dsi-t-clk-pre = <0x23>; qcom,mdss-dsi-t-clk-post = <0x15>; qcom,mdss-dsi-t-clk-pre = <0x12>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 05 03 03 04 00]; 05 03 03 04 00 12 15]; qcom,display-topology = <1 1 1>, <2 2 1>, /* dsc merge */ <2 1 1>; /* 3d mux */ Loading @@ -476,12 +477,12 @@ }; &dsi_nt35597_truly_dsc_video { qcom,mdss-dsi-t-clk-post = <0x0b>; qcom,mdss-dsi-t-clk-pre = <0x23>; qcom,mdss-dsi-t-clk-post = <0x15>; qcom,mdss-dsi-t-clk-pre = <0x12>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 04 03 03 04 00]; 05 03 03 04 00 12 15]; qcom,display-topology = <1 1 1>, <2 2 1>, /* dsc merge */ <2 1 1>; /* 3d mux */ Loading