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Commit 6e0829cb authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add mem_dump and RTB node for sdm429"

parents fdef8f99 6f1fb566
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+2 −0
Original line number Diff line number Diff line
@@ -76,6 +76,7 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_BOOST=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_MSM=y
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
CONFIG_VFP=y
@@ -626,6 +627,7 @@ CONFIG_PAGE_OWNER=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
CONFIG_SCHED_STACK_END_CHECK=y
CONFIG_IPC_LOGGING=y
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
+1 −0
Original line number Diff line number Diff line
@@ -78,6 +78,7 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_BOOST=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_MSM=y
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
CONFIG_VFP=y
+4 −10
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@
			reg = <0x100>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <1024>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
			next-level-cache = <&L2_1>;
			#cooling-cells = <2>;
@@ -69,7 +69,7 @@
			reg = <0x101>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <1024>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
			next-level-cache = <&L2_1>;
			#cooling-cells = <2>;
@@ -89,7 +89,7 @@
			reg = <0x102>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <1024>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
			next-level-cache = <&L2_1>;
			#cooling-cells = <2>;
@@ -109,7 +109,7 @@
			reg = <0x103>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <1024>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
			next-level-cache = <&L2_1>;
			#cooling-cells = <2>;
@@ -134,9 +134,6 @@
				1305600	207
				1497600	256
				1708800	327
				1804800	343
				1958400	445
				2016000	470
			>;
			idle-cost-data = <
				100 80 60 40
@@ -148,9 +145,6 @@
				1305600	61
				1497600	71
				1708800	85
				1804800	88
				1958400	110
				2016000	120
			>;
			idle-cost-data = <
				4 3 2 1
+105 −2
Original line number Diff line number Diff line
@@ -19,6 +19,9 @@
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
#include <dt-bindings/clock/qcom,cpu-sdm.h>

#define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024))
#define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;}

/ {
	model = "Qualcomm Technologies, Inc. SDM429";
	compatible = "qcom,sdm429";
@@ -423,7 +426,6 @@
	cpu-pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <1 7 0xff00>;
		status = "disabled";
	};

	qcom,sps {
@@ -471,7 +473,6 @@
	qcom,msm-rtb {
		compatible = "qcom,msm-rtb";
		qcom,rtb-size = <0x100000>; /* 1M EBI1 buffer */
		status = "disabled";
	};

	qcom,rmtfs_sharedmem@00000000 {
@@ -613,6 +614,46 @@
		};
	};

	 mem_dump {
		compatible = "qcom,mem-dump";
		memory-region = <0x85>;

		rpm_sw_dump {
			qcom,dump-size = <0x28000>;
			qcom,dump-id = <0xea>;
		};

		pmic_dump {
			qcom,dump-size = <0x10000>;
			qcom,dump-id = <0xe4>;
		};

		vsense_dump {
			qcom,dump-size = <0x1000>;
			qcom,dump-id = <0xe9>;
		};

		tmc_etf_dump {
			qcom,dump-size = <0x10000>;
			qcom,dump-id = <0xf0>;
		};

		 tmc_etr_reg_dump {
			 qcom,dump-size = <0x1000>;
			 qcom,dump-id = <0x100>;
		 };

		 tmc_etf_reg_dump {
			 qcom,dump-size = <0x1000>;
			 qcom,dump-id = <0x101>;
		};

		 misc_data_dump {
			 qcom,dump-size = <0x1000>;
			 qcom,dump-id = <0xe8>;
		 };
	};

	qcom,lpass@c000000 {
		compatible = "qcom,pil-tz-generic";
		reg = <0xc000000 0x00100>;
@@ -1317,6 +1358,68 @@
		qcom,ea-pc = <0x230>;
		status = "disabled";
	};

	qcom,msm-adsp-loader {
		status = "ok";
		compatible = "qcom,adsp-loader";
		qcom,adsp-state = <0>;
	};

	msm_cpufreq: qcom,msm-cpufreq {
		compatible = "qcom,msm-cpufreq";
		clock-names = "cpu0_clk";
		clocks = <&cpu APCS_MUX_C1_CLK>;

		qcom,cpufreq-table =
			< 960000  >,
			< 1305600 >,
			< 1497600 >,
			< 1708800 >;
	};
	ddr_bw_opp_table: ddr-bw-opp-table {
		compatible = "operating-points-v2";
		BW_OPP_ENTRY( 211,8); /* 2265 MB/s */
		BW_OPP_ENTRY( 384, 8); /* 4539 MB/s */
		BW_OPP_ENTRY( 662, 8); /* 5416 MB/s */
		BW_OPP_ENTRY( 749, 8);
	};

	cpubw: qcom,cpubw {
		compatible = "qcom,devbw";
		governor = "performance";
		qcom,src-dst-ports = <1 512>;
		qcom,active-only;
		operating-points-v2 = <&ddr_bw_opp_table>;
	};

	com,cpu-bwmon {
		compatible = "qcom,bimc-bwmon2";
		reg = <0x408000 0x300>, <0x401000 0x200>;
		reg-names = "base", "global_base";
		interrupts = <0 183 4>;
		qcom,mport = <0>;
		qcom,target-dev = <&cpubw>;
	};

	cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor {
		compatible = "qcom,devbw";
		governor = "performance";
		qcom,src-dst-ports = <1 512>;
		qcom,active-only;
		operating-points-v2 = <&ddr_bw_opp_table>;
	};

	cpu0_computemon: qcom,cpu0-computemon {
		compatible = "qcom,arm-cpu-mon";
		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;
		qcom,target-dev = <&cpu0_cpu_ddr_latfloor>;
		qcom,core-dev-table =
			< 960000  MHZ_TO_MBPS( 211, 8) >,
			< 1305600 MHZ_TO_MBPS( 384, 8) >,
			< 1497600 MHZ_TO_MBPS( 662, 8) >,
			< 1708800 MHZ_TO_MBPS( 749, 8) >;
	};

};

#include "sdm429-gdsc.dtsi"