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Commit 6b01e356 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm: ais: Enable all IFE and CCI for sa8195"

parents 2b01c333 b67d9876

arch/arm64/boot/dts/qcom/sa8195p-camera-sensor.dtsi

0 → 100644
+147 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&cam_cci0 {

	qcom,cam-res-mgr {

		compatible = "qcom,cam-res-mgr";

		status = "ok";

	};



	qcom,cam-sensor@0 {

		cell-index = <0>;

		compatible = "qcom,cam-sensor";

		reg = <0x0>;

		csiphy-sd-index = <0>;

		sensor-position-roll = <90>;

		sensor-position-pitch = <0>;

		sensor-position-yaw = <180>;

		cam_vio-supply = <&pm8195_s4>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

		cam_clk-supply = <&titan_top_gdsc>;

		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk", "cam_bob";

		pinctrl-names = "sensor_default", "sensor_suspend";

		pinctrl-0 = <&cam_sensor0_active>;

		pinctrl-1 = <&cam_sensor0_suspend>;

		gpios = <&tlmm 21 0>;

		gpio-reset = <0>;

		gpio-req-tbl-num = <0 >;

		gpio-req-tbl-flags = < 0>;

		gpio-req-tbl-label = "CAM_RESET0";

		sensor-mode = <0>;

		cci-master = <0>;

		status = "ok";

		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;

		clock-names = "cam_clk";

		clock-cntl-level = "turbo";

		clock-rates = <24000000>;

	};



	qcom,cam-sensor@1 {

		cell-index = <1>;

		compatible = "qcom,cam-sensor";

		reg = <0x1>;

		csiphy-sd-index = <1>;

		sensor-position-roll = <90>;

		sensor-position-pitch = <0>;

		sensor-position-yaw = <180>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

		cam_vio-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_clk-supply = <&titan_top_gdsc>;

		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk", "cam_bob";

		pinctrl-names = "sensor_default", "sensor_suspend";

		pinctrl-0 = <&cam_sensor1_active>;

		pinctrl-1 = <&cam_sensor1_suspend>;

		gpios = <&tlmm 22 0>;

		gpio-reset = <0>;

		gpio-req-tbl-num = <0>;

		gpio-req-tbl-flags = <0>;

		gpio-req-tbl-label = "CAM_RESET1";

		sensor-mode = <0>;

		cci-master = <0>;

		status = "ok";

		clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;

		clock-names = "cam_clk";

		clock-cntl-level = "turbo";

		clock-rates = <24000000>;

	};



	qcom,cam-sensor@2 {

		cell-index = <2>;

		compatible = "qcom,cam-sensor";

		reg = <0x02>;

		csiphy-sd-index = <2>;

		sensor-position-roll = <90>;

		sensor-position-pitch = <0>;

		sensor-position-yaw = <0>;

		cam_vio-supply = <&pm8195_s4>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

		cam_clk-supply = <&titan_top_gdsc>;

		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk", "cam_bob";

		pinctrl-names = "sensor_default", "sensor_suspend";

		pinctrl-0 = <&cam_sensor2_active>;

		pinctrl-1 = <&cam_sensor2_suspend>;

		gpios = <&tlmm 23 0>;

		gpio-reset = <0>;

		gpio-req-tbl-num = <0>;

		gpio-req-tbl-flags = <0>;

		gpio-req-tbl-label = "CAM_RESET2";

		sensor-mode = <0>;

		cci-master = <1>;

		status = "ok";

		clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;

		clock-names = "cam_clk";

		clock-cntl-level = "turbo";

		clock-rates = <24000000>;

	};



	qcom,cam-sensor@3 {

		cell-index = <3>;

		compatible = "qcom,cam-sensor";

		reg = <0x03>;

		csiphy-sd-index = <3>;

		sensor-position-roll = <270>;

		sensor-position-pitch = <0>;

		sensor-position-yaw = <0>;

		cam_vio-supply = <&pm8195_s4>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

		cam_clk-supply = <&titan_top_gdsc>;

		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk", "cam_bob";

		pinctrl-names = "sensor_default", "sensor_suspend";

		pinctrl-0 = <&cam_sensor3_active>;

		pinctrl-1 = <&cam_sensor3_suspend>;

		gpios = <&tlmm 25 0>;

		gpio-reset = <0>;

		gpio-req-tbl-num = <0>;

		gpio-req-tbl-flags = <0>;

		gpio-req-tbl-label = "CAM_RESET3";

		sensor-mode = <0>;

		cci-master = <1>;

		status = "ok";

		clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;

		clock-names = "cam_clk";

		clock-cntl-level = "turbo";

		clock-rates = <24000000>;

	};

};

arch/arm64/boot/dts/qcom/sa8195p-camera.dtsi

0 → 100644
+1730 −0

File added.

Preview size limit exceeded, changes collapsed.

arch/arm64/boot/dts/qcom/sa8195p.dtsi

+2 −147
Original line number Diff line number Diff line
@@ -14,9 +14,8 @@ 
#include "sdmshrike-v2.dtsi"

#include "sa8155-audio.dtsi"

#include "sa8195-pmic.dtsi"

#include "sm8150-camera.dtsi"

#include "sm8150-v2-camera.dtsi"

#include "sa8155-camera-sensor.dtsi"

#include "sa8195p-camera.dtsi"

#include "sa8195p-camera-sensor.dtsi"

#include "sa8195p-pcie.dtsi"

#include "sm8150-npu.dtsi"
@@ -219,80 +218,6 @@ 
		};

	};



	qcom,cam_smmu {

		msm_cam_smmu_ife {

			iommus = <&apps_smmu 0xAA0 0x4E0>,

				<&apps_smmu 0xA20 0x4E0>,

				<&apps_smmu 0xA00 0x4E0>,

				<&apps_smmu 0xA80 0x4E0>,

				<&apps_smmu 0xEA0 0x4E0>,

				<&apps_smmu 0xE20 0x4E0>,

				<&apps_smmu 0xE00 0x4E0>,

				<&apps_smmu 0xE80 0x4E0>;

		};



		msm_cam_smmu_jpeg {

			iommus = <&apps_smmu 0x2100 0x20>,

				<&apps_smmu 0x2120 0x20>;

		};



		msm_cam_smmu_icp {

			iommus = <&apps_smmu 0x2042 0x0>,

				<&apps_smmu 0x2080 0x320>,

				<&apps_smmu 0x20A0 0x320>,

				<&apps_smmu 0x2380 0x320>,

				<&apps_smmu 0x23A0 0x320>,

				<&apps_smmu 0x20C0 0x300>,

				<&apps_smmu 0x23C0 0x300>;

		};



		msm_cam_smmu_fd {

			iommus = <&apps_smmu 0x2140 0x20>,

				<&apps_smmu 0x2160 0x20>;

		};



		msm_cam_smmu_lrme {

			iommus = <&apps_smmu 0x20e0 0x300>,

				<&apps_smmu 0x23E0 0x300>;

		};

	};



	cam_csid0 {

		clock-rates =

			<400000000 0 0 0 400000000 0 0>,

			<400000000 0 0 0 558000000 0 0>,

			<480000000 0 0 0 637000000 0 0>,

			<600000000 0 0 0 760000000 0 0>;

		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";

	};



	cam_csid1 {

		clock-rates =

			<400000000 0 0 0 400000000 0 0>,

			<400000000 0 0 0 558000000 0 0>,

			<480000000 0 0 0 637000000 0 0>,

			<600000000 0 0 0 760000000 0 0>;

		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";

	};



	cam_vfe0 {

		clock-rates =

			<400000000 0 0>,

			<558000000 0 0>,

			<637000000 0 0>,

			<760000000 0 0>;

		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";

	};



	cam_vfe1 {

		clock-rates =

			<400000000 0 0>,

			<558000000 0 0>,

			<637000000 0 0>,

			<760000000 0 0>;

		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";

	};



	npu_npu_ddr_bw: qcom,npu-npu-ddr-bw {

		compatible = "qcom,devbw";

		governor = "performance";
@@ -451,76 +376,6 @@ 
	status = "ok";

};



&cam_csiphy0 {

	mipi-csi-vdd-supply = <&pm8195_3_l5>;

	mipi-csi-vdd1p2-supply = <&pm8195_1_l9>;

	regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";

	rgltr-cntrl-support;

	rgltr-min-voltage = <0 880000 1200000>;

	rgltr-max-voltage = <0 880000 1200000>;

	rgltr-load-current = <0 36000 21800>;

};



&cam_csiphy1 {

	mipi-csi-vdd-supply = <&pm8195_3_l5>;

	mipi-csi-vdd1p2-supply = <&pm8195_1_l9>;

	regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";

	rgltr-cntrl-support;

	rgltr-min-voltage = <0 880000 1200000>;

	rgltr-max-voltage = <0 880000 1200000>;

	rgltr-load-current = <0 36000 21800>;

};



&cam_csiphy2 {

	mipi-csi-vdd-supply = <&pm8195_3_l5>;

	mipi-csi-vdd1p2-supply = <&pm8195_1_l9>;

	regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";

	rgltr-cntrl-support;

	rgltr-min-voltage = <0 880000 1200000>;

	rgltr-max-voltage = <0 880000 1200000>;

	rgltr-load-current = <0 36000 21800>;

};



&cam_csiphy3 {

	mipi-csi-vdd-supply = <&pm8195_3_l5>;

	mipi-csi-vdd1p2-supply = <&pm8195_1_l9>;

	regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";

	rgltr-cntrl-support;

	rgltr-min-voltage = <0 880000 1200000>;

	rgltr-max-voltage = <0 880000 1200000>;

	rgltr-load-current = <0 36000 21800>;

};



&cam_cci0 {

	qcom,cam-sensor@0 {

		cam_vio-supply = <&pm8195_s4>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

	};



	qcom,cam-sensor@1 {

		cam_vio-supply = <&pm8195_s4>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

	};



	qcom,cam-sensor@2 {

		cam_vio-supply = <&pm8195_s4>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

	};



	qcom,cam-sensor@3 {

		cam_vio-supply = <&pm8195_s4>;

		cam_bob-supply = <&pm8195_s4>;

		cam_vana-supply = <&pm8195_s4>;

		cam_vdig-supply = <&pm8195_s4>;

	};

};



&thermal_zones {

	cpu-1-7-lowf {

		cooling-maps {

arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi

+113 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -2469,6 +2469,118 @@ 
			};

		};



		cci4_active: cci4_active {

			mux {

				/* CLK, DATA */

				pins = "gpio0","gpio1";

				function = "cci_i2c";

			};



			config {

				pins = "gpio0","gpio1";

				bias-pull-up; /* PULL UP*/

				drive-strength = <2>; /* 2 MA */

			};

		};



		cci4_suspend: cci4_suspend {

			mux {

				/* CLK, DATA */

				pins = "gpio0","gpio1";

				function = "cci_i2c";

			};



			config {

				pins = "gpio0","gpio1";

				bias-pull-down; /* PULL DOWN */

				drive-strength = <2>; /* 2 MA */

			};

		};



		cci5_active: cci5_active {

			mux {

				/* CLK, DATA */

				pins = "gpio2","gpio3";

				function = "cci_i2c";

			};



			config {

				pins = "gpio2","gpio3";

				bias-pull-up; /* PULL UP*/

				drive-strength = <2>; /* 2 MA */

			};

		};



		cci5_suspend: cci5_suspend {

			mux {

				/* CLK, DATA */

				pins = "gpio2","gpio3";

				function = "cci_i2c";

			};



			config {

				pins = "gpio2","gpio3";

				bias-pull-down; /* PULL DOWN */

				drive-strength = <2>; /* 2 MA */

			};

		};



		cci6_active: cci6_active {

			mux {

				/* CLK, DATA */

				pins = "gpio39","gpio40";

				function = "cci_i2c";

			};



			config {

				pins = "gpio39","gpio40";

				bias-pull-up; /* PULL UP*/

				drive-strength = <2>; /* 2 MA */

			};

		};



		cci6_suspend: cci6_suspend {

			mux {

				/* CLK, DATA */

				pins = "gpio39","gpio40";

				function = "cci_i2c";

			};



			config {

				pins = "gpio39","gpio40";

				bias-pull-down; /* PULL DOWN */

				drive-strength = <2>; /* 2 MA */

			};

		};



		cci7_active: cci7_active {

			mux {

				/* CLK, DATA */

				pins = "gpio41","gpio42";

				function = "cci_i2c";

			};



			config {

				pins = "gpio41","gpio42";

				bias-pull-up; /* PULL UP*/

				drive-strength = <2>; /* 2 MA */

			};

		};



		cci7_suspend: cci7_suspend {

			mux {

				/* CLK, DATA */

				pins = "gpio41","gpio42";

				function = "cci_i2c";

			};



			config {

				pins = "gpio41","gpio42";

				bias-pull-down; /* PULL DOWN */

				drive-strength = <2>; /* 2 MA */

			};

		};



		fsa_usbc_ana_en_n@100 {

			fsa_usbc_ana_en: fsa_usbc_ana_en {

				mux {

drivers/media/platform/msm/ais/cam_cpas/cam_cpas_hw.h

+2 −2
Original line number Diff line number Diff line 
/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -17,7 +17,7 @@ 
#include "cam_cpas_hw_intf.h"

#include "cam_common_util.h"



#define CAM_CPAS_MAX_CLIENTS 30

#define CAM_CPAS_MAX_CLIENTS 34

#define CAM_CPAS_INFLIGHT_WORKS 5



#define CAM_CPAS_AXI_MIN_MNOC_AB_BW   (2048 * 1024)