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Commit 5dee92b7 authored by Aditya Bavanari's avatar Aditya Bavanari
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ARM: dts: msm: Update chip wake up registers for atoll ab variants 



Update the chip wake up register, mask bit and default
values for atoll ab variant target in order to enable
the interrupt mask bits.

Change-Id: Iba85df18c5c617cd73b27e5e3fe51e38a2fd5509
Signed-off-by: default avatarAditya Bavanari <abavanar@codeaurora.org>
parent eb4a1b91

Documentation/devicetree/bindings/sound/qcom-audio-dev.txt

+5 −0
Original line number Diff line number Diff line
@@ -433,6 +433,11 @@ Required properties: 
Optional properties:

 - qcom,lpi-gpios : This boolean property is added if GPIOs are under

                    LPI TLMM.

- qcom,chip-wakeup-reg : This lists registers related to control interrupt mask

		for respective LPI TLMM GPIOs.

- qcom,chip-wakeup-maskbit : This gives info on maskbit for given list of registers.

- qcom,chip-wakeup-default-val : This gives info on default value to be updated

		for given chip regs.



* msm-dai-slim

arch/arm64/boot/dts/qcom/atoll-ab-atp-overlay.dts

+6 −0
Original line number Diff line number Diff line
@@ -28,3 +28,9 @@ 
&dsi_rm69299_visionox_amoled_vid_display {

	qcom,dsi-display-active;

};



&tx_swr_gpios {

	qcom,chip-wakeup-reg = <0x01FFB000>;

	qcom,chip-wakeup-maskbit = <0>;

	qcom,chip-wakeup-default-val = <0x1>;

};

arch/arm64/boot/dts/qcom/atoll-ab-idp-overlay.dts

+6 −0
Original line number Diff line number Diff line
@@ -28,3 +28,9 @@ 
&dsi_rm69299_visionox_amoled_vid_display {

	qcom,dsi-display-active;

};



&tx_swr_gpios {

	qcom,chip-wakeup-reg = <0x01FFB000>;

	qcom,chip-wakeup-maskbit = <0>;

	qcom,chip-wakeup-default-val = <0x1>;

};

arch/arm64/boot/dts/qcom/atoll-ab-qrd.dts

+6 −0
Original line number Diff line number Diff line
@@ -20,3 +20,9 @@ 
	compatible = "qcom,atoll-ab-qrd", "qcom,atoll-ab", "qcom,qrd";

	qcom,board-id = <0x1000B 0>;

};



&tx_swr_gpios {

	qcom,chip-wakeup-reg = <0x01FFB000>;

	qcom,chip-wakeup-maskbit = <0>;

	qcom,chip-wakeup-default-val = <0x1>;

};