clk: qcom: mdss: Add additional dividers for 10nm pll CPHY support

Panels supporting Cphy use a specific divider blocks. Add additional
divider blocks for clock output to support DSI CPHY.

Change-Id: Ie509c9074ced7ae055a4feff88d7d4a529f11d0c
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>