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Commit 5561a4f4 authored by Mayank Rana's avatar Mayank Rana
Browse files

usb: phy: replace readb/writeb{_relaxed} with readl/writel{_releaxed} 



USB QMP PHY registers are 32-bit. On some platform writeb_relaxed API
doesn't update device memory when register is 32-bit addressable. Hence
fix this issue by replacing readb/writeb{_relaxed} API with
readl/writel{_relaxed} APIs.

Change-Id: Iae1a938a7828189e7afcdef61860b6fcc487f7a8
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
parent 4875db87

drivers/usb/phy/phy-msm-ssusb-qmp.c

+6 −6
Original line number Diff line number Diff line
@@ -168,11 +168,11 @@ static inline char *get_cable_status_str(struct msm_ssphy_qmp *phy) 


static void msm_ssusb_qmp_clr_lfps_rxterm_int(struct msm_ssphy_qmp *phy)

{

	writeb_relaxed(1, phy->base +

	writel_relaxed(1, phy->base +

			phy->phy_reg[USB3_PHY_LFPS_RXTERM_IRQ_CLEAR]);

	/* flush the previous write before next write */

	wmb();

	writeb_relaxed(0, phy->base +

	writel_relaxed(0, phy->base +

			phy->phy_reg[USB3_PHY_LFPS_RXTERM_IRQ_CLEAR]);

}
@@ -198,7 +198,7 @@ static void msm_ssusb_qmp_clamp_enable(struct msm_ssphy_qmp *phy, bool val) 
static void msm_ssusb_qmp_enable_autonomous(struct msm_ssphy_qmp *phy,

		int enable)

{

	u8 val;

	u32 val;

	unsigned int autonomous_mode_offset =

			phy->phy_reg[USB3_PHY_AUTONOMOUS_MODE_CTRL];
@@ -207,7 +207,7 @@ static void msm_ssusb_qmp_enable_autonomous(struct msm_ssphy_qmp *phy, 


	if (enable) {

		msm_ssusb_qmp_clr_lfps_rxterm_int(phy);

		val = readb_relaxed(phy->base + autonomous_mode_offset);

		val = readl_relaxed(phy->base + autonomous_mode_offset);

		val |= ARCVR_DTCT_EN;

		if (phy->phy.flags & DEVICE_IN_SS_MODE) {

			val |= ALFPS_DTCT_EN;
@@ -216,11 +216,11 @@ static void msm_ssusb_qmp_enable_autonomous(struct msm_ssphy_qmp *phy, 
			val &= ~ALFPS_DTCT_EN;

			val |= ARCVR_DTCT_EVENT_SEL;

		}

		writeb_relaxed(val, phy->base + autonomous_mode_offset);

		writel_relaxed(val, phy->base + autonomous_mode_offset);

		msm_ssusb_qmp_clamp_enable(phy, true);

	} else {

		msm_ssusb_qmp_clamp_enable(phy, false);

		writeb_relaxed(0, phy->base + autonomous_mode_offset);

		writel_relaxed(0, phy->base + autonomous_mode_offset);

		msm_ssusb_qmp_clr_lfps_rxterm_int(phy);

	}

}