Loading drivers/platform/msm/ep_pcie/ep_pcie_core.c +4 −10 Original line number Diff line number Diff line Loading @@ -1915,16 +1915,10 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt) ep_pcie_bar0_address = readl_relaxed(dev->dm_core + PCIE20_BAR0); } else { if (!(opt & EP_PCIE_OPT_ENUM_ASYNC)) EP_PCIE_ERR(dev, "PCIe V%d: PCIe link is up but BME is still disabled after max waiting time\n", dev->rev); if (!ep_pcie_debug_keep_resource && !(opt&EP_PCIE_OPT_ENUM_ASYNC)) { ret = EP_PCIE_ERROR; dev->link_status = EP_PCIE_LINK_DISABLED; goto link_fail; } EP_PCIE_DBG(dev, "PCIe V%d: PCIe link is up but BME is disabled; current SW link status:%d\n", dev->rev, dev->link_status); dev->link_status = EP_PCIE_LINK_UP; } dev->suspending = false; Loading drivers/platform/msm/mhi_dev/mhi_sm.c +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -1014,7 +1014,7 @@ static void mhi_sm_pcie_event_manager(struct work_struct *work) spin_unlock_irqrestore(&mhi_sm_ctx->mhi_dev->lock, flags); res = ep_pcie_enable_endpoint(mhi_sm_ctx->mhi_dev->phandle, EP_PCIE_OPT_ENUM); EP_PCIE_OPT_ENUM | EP_PCIE_OPT_ENUM_ASYNC); if (res) { MHI_SM_ERR("ep-pcie failed to link train, return %d\n", res); Loading Loading
drivers/platform/msm/ep_pcie/ep_pcie_core.c +4 −10 Original line number Diff line number Diff line Loading @@ -1915,16 +1915,10 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt) ep_pcie_bar0_address = readl_relaxed(dev->dm_core + PCIE20_BAR0); } else { if (!(opt & EP_PCIE_OPT_ENUM_ASYNC)) EP_PCIE_ERR(dev, "PCIe V%d: PCIe link is up but BME is still disabled after max waiting time\n", dev->rev); if (!ep_pcie_debug_keep_resource && !(opt&EP_PCIE_OPT_ENUM_ASYNC)) { ret = EP_PCIE_ERROR; dev->link_status = EP_PCIE_LINK_DISABLED; goto link_fail; } EP_PCIE_DBG(dev, "PCIe V%d: PCIe link is up but BME is disabled; current SW link status:%d\n", dev->rev, dev->link_status); dev->link_status = EP_PCIE_LINK_UP; } dev->suspending = false; Loading
drivers/platform/msm/mhi_dev/mhi_sm.c +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -1014,7 +1014,7 @@ static void mhi_sm_pcie_event_manager(struct work_struct *work) spin_unlock_irqrestore(&mhi_sm_ctx->mhi_dev->lock, flags); res = ep_pcie_enable_endpoint(mhi_sm_ctx->mhi_dev->phandle, EP_PCIE_OPT_ENUM); EP_PCIE_OPT_ENUM | EP_PCIE_OPT_ENUM_ASYNC); if (res) { MHI_SM_ERR("ep-pcie failed to link train, return %d\n", res); Loading