Loading drivers/clk/qcom/gpucc-sm6150.c +14 −0 Original line number Diff line number Diff line Loading @@ -437,6 +437,19 @@ static struct clk_branch gpu_cc_ahb_clk = { }, }; static struct clk_branch gpu_cc_hlos1_vote_gpu_smmu_clk = { .halt_reg = 0x5000, .halt_check = BRANCH_VOTED, .clkr = { .enable_reg = 0x5000, .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gpu_cc_hlos1_vote_gpu_smmu_clk", .ops = &clk_branch2_ops, }, }, }; struct clk_hw *gpu_cc_sm6150_hws[] = { [CRC_DIV_PLL0_OUT_AUX2] = &crc_div_pll0_out_aux2.hw, [CRC_DIV_PLL1_OUT_AUX2] = &crc_div_pll1_out_aux2.hw, Loading @@ -459,6 +472,7 @@ static struct clk_regmap *gpu_cc_sm6150_clocks[] = { [GPU_CC_GX_GFX3D_CLK] = &gpu_cc_gx_gfx3d_clk.clkr, [GPU_CC_GX_GFX3D_CLK_SRC] = &gpu_cc_gx_gfx3d_clk_src.clkr, [GPU_CC_AHB_CLK] = &gpu_cc_ahb_clk.clkr, [GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK] = &gpu_cc_hlos1_vote_gpu_smmu_clk.clkr, }; static const struct regmap_config gpu_cc_sm6150_regmap_config = { Loading include/dt-bindings/clock/qcom,gpucc-sm6150.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -36,5 +36,6 @@ #define GPU_CC_GX_GFX3D_CLK 16 #define GPU_CC_GX_GFX3D_CLK_SRC 17 #define GPU_CC_AHB_CLK 18 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 19 #endif Loading
drivers/clk/qcom/gpucc-sm6150.c +14 −0 Original line number Diff line number Diff line Loading @@ -437,6 +437,19 @@ static struct clk_branch gpu_cc_ahb_clk = { }, }; static struct clk_branch gpu_cc_hlos1_vote_gpu_smmu_clk = { .halt_reg = 0x5000, .halt_check = BRANCH_VOTED, .clkr = { .enable_reg = 0x5000, .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gpu_cc_hlos1_vote_gpu_smmu_clk", .ops = &clk_branch2_ops, }, }, }; struct clk_hw *gpu_cc_sm6150_hws[] = { [CRC_DIV_PLL0_OUT_AUX2] = &crc_div_pll0_out_aux2.hw, [CRC_DIV_PLL1_OUT_AUX2] = &crc_div_pll1_out_aux2.hw, Loading @@ -459,6 +472,7 @@ static struct clk_regmap *gpu_cc_sm6150_clocks[] = { [GPU_CC_GX_GFX3D_CLK] = &gpu_cc_gx_gfx3d_clk.clkr, [GPU_CC_GX_GFX3D_CLK_SRC] = &gpu_cc_gx_gfx3d_clk_src.clkr, [GPU_CC_AHB_CLK] = &gpu_cc_ahb_clk.clkr, [GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK] = &gpu_cc_hlos1_vote_gpu_smmu_clk.clkr, }; static const struct regmap_config gpu_cc_sm6150_regmap_config = { Loading
include/dt-bindings/clock/qcom,gpucc-sm6150.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -36,5 +36,6 @@ #define GPU_CC_GX_GFX3D_CLK 16 #define GPU_CC_GX_GFX3D_CLK_SRC 17 #define GPU_CC_AHB_CLK 18 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 19 #endif