Loading drivers/gpu/msm/kgsl_hfi.c +12 −0 Original line number Original line Diff line number Diff line Loading @@ -193,6 +193,7 @@ static int hfi_queue_write(struct gmu_device *gmu, uint32_t queue_idx, void hfi_init(struct kgsl_hfi *hfi, struct gmu_memdesc *mem_addr, void hfi_init(struct kgsl_hfi *hfi, struct gmu_memdesc *mem_addr, uint32_t queue_sz_bytes) uint32_t queue_sz_bytes) { { struct adreno_device *adreno_dev = ADRENO_DEVICE(hfi->kgsldev); int i; int i; struct hfi_queue_table *tbl; struct hfi_queue_table *tbl; struct hfi_queue_header *hdr; struct hfi_queue_header *hdr; Loading @@ -207,6 +208,17 @@ void hfi_init(struct kgsl_hfi *hfi, struct gmu_memdesc *mem_addr, { HFI_DSP_IDX_0, HFI_DSP_PRI_0, HFI_QUEUE_STATUS_DISABLED }, { HFI_DSP_IDX_0, HFI_DSP_PRI_0, HFI_QUEUE_STATUS_DISABLED }, }; }; /* * Overwrite the queue IDs for A630, A615 and A616 as they use * legacy firmware. Legacy firmware has different queue IDs for * message, debug and dispatch queues. */ if (adreno_is_a630(adreno_dev) || adreno_is_a615_family(adreno_dev)) { queue[HFI_MSG_ID].idx = HFI_MSG_IDX_LEGACY; queue[HFI_DBG_ID].idx = HFI_DBG_IDX_LEGACY; queue[HFI_DSP_ID_0].idx = HFI_DSP_IDX_0_LEGACY; } /* Fill Table Header */ /* Fill Table Header */ tbl = mem_addr->hostptr; tbl = mem_addr->hostptr; tbl->qtbl_hdr.version = 0; tbl->qtbl_hdr.version = 0; Loading drivers/gpu/msm/kgsl_hfi.h +5 −0 Original line number Original line Diff line number Diff line Loading @@ -42,6 +42,11 @@ struct hfi_queue_table; #define HFI_DSP_IDX_BASE 3 #define HFI_DSP_IDX_BASE 3 #define HFI_DSP_IDX_0 3 #define HFI_DSP_IDX_0 3 #define HFI_CMD_IDX_LEGACY 0 #define HFI_DSP_IDX_0_LEGACY 1 #define HFI_MSG_IDX_LEGACY 4 #define HFI_DBG_IDX_LEGACY 5 #define HFI_QUEUE_STATUS_DISABLED 0 #define HFI_QUEUE_STATUS_DISABLED 0 #define HFI_QUEUE_STATUS_ENABLED 1 #define HFI_QUEUE_STATUS_ENABLED 1 Loading Loading
drivers/gpu/msm/kgsl_hfi.c +12 −0 Original line number Original line Diff line number Diff line Loading @@ -193,6 +193,7 @@ static int hfi_queue_write(struct gmu_device *gmu, uint32_t queue_idx, void hfi_init(struct kgsl_hfi *hfi, struct gmu_memdesc *mem_addr, void hfi_init(struct kgsl_hfi *hfi, struct gmu_memdesc *mem_addr, uint32_t queue_sz_bytes) uint32_t queue_sz_bytes) { { struct adreno_device *adreno_dev = ADRENO_DEVICE(hfi->kgsldev); int i; int i; struct hfi_queue_table *tbl; struct hfi_queue_table *tbl; struct hfi_queue_header *hdr; struct hfi_queue_header *hdr; Loading @@ -207,6 +208,17 @@ void hfi_init(struct kgsl_hfi *hfi, struct gmu_memdesc *mem_addr, { HFI_DSP_IDX_0, HFI_DSP_PRI_0, HFI_QUEUE_STATUS_DISABLED }, { HFI_DSP_IDX_0, HFI_DSP_PRI_0, HFI_QUEUE_STATUS_DISABLED }, }; }; /* * Overwrite the queue IDs for A630, A615 and A616 as they use * legacy firmware. Legacy firmware has different queue IDs for * message, debug and dispatch queues. */ if (adreno_is_a630(adreno_dev) || adreno_is_a615_family(adreno_dev)) { queue[HFI_MSG_ID].idx = HFI_MSG_IDX_LEGACY; queue[HFI_DBG_ID].idx = HFI_DBG_IDX_LEGACY; queue[HFI_DSP_ID_0].idx = HFI_DSP_IDX_0_LEGACY; } /* Fill Table Header */ /* Fill Table Header */ tbl = mem_addr->hostptr; tbl = mem_addr->hostptr; tbl->qtbl_hdr.version = 0; tbl->qtbl_hdr.version = 0; Loading
drivers/gpu/msm/kgsl_hfi.h +5 −0 Original line number Original line Diff line number Diff line Loading @@ -42,6 +42,11 @@ struct hfi_queue_table; #define HFI_DSP_IDX_BASE 3 #define HFI_DSP_IDX_BASE 3 #define HFI_DSP_IDX_0 3 #define HFI_DSP_IDX_0 3 #define HFI_CMD_IDX_LEGACY 0 #define HFI_DSP_IDX_0_LEGACY 1 #define HFI_MSG_IDX_LEGACY 4 #define HFI_DBG_IDX_LEGACY 5 #define HFI_QUEUE_STATUS_DISABLED 0 #define HFI_QUEUE_STATUS_DISABLED 0 #define HFI_QUEUE_STATUS_ENABLED 1 #define HFI_QUEUE_STATUS_ENABLED 1 Loading