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Commit 4649b939 authored by Harshdeep Dhatt's avatar Harshdeep Dhatt Committed by Gerrit - the friendly Code Review server
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msm: kgsl: Extend the preemption keep-alive bit 



This is needed in order to avoid the spurious interrupts
seen during preemption.

Change-Id: Id8a465d1d3ea5b6994ab36d24d0efa1a84c9c6b6
Signed-off-by: default avatarHarshdeep Dhatt <hdhatt@codeaurora.org>
Signed-off-by: default avatarUrvashi Agrawal <urvaagra@codeaurora.org>
parent c415a00c

drivers/gpu/msm/adreno_a6xx_preempt.c

+7 −8
Original line number Diff line number Diff line
@@ -366,14 +366,6 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) 
	/* Trigger the preemption */

	adreno_gmu_fenced_write(adreno_dev, ADRENO_REG_CP_PREEMPT, cntl,

		FENCE_STATUS_WRITEDROPPED1_MASK);



	/*

	 * Once preemption has been requested with the final register write,

	 * the preemption process starts and the GPU is considered busy.

	 * We can now safely clear the preemption keepalive bit, allowing

	 * power collapse to resume its regular activity.

	 */

	kgsl_gmu_regrmw(device, A6XX_GMU_AO_SPARE_CNTL, 0x2, 0x0);

}



void a6xx_preemption_callback(struct adreno_device *adreno_dev, int bit)
@@ -401,6 +393,13 @@ void a6xx_preemption_callback(struct adreno_device *adreno_dev, int bit) 
		return;

	}



	/*

	 * We can now safely clear the preemption keepalive bit, allowing

	 * power collapse to resume its regular activity.

	 */

	kgsl_gmu_regrmw(KGSL_DEVICE(adreno_dev), A6XX_GMU_AO_SPARE_CNTL, 0x2,

			0x0);



	del_timer(&adreno_dev->preempt.timer);



	adreno_readreg(adreno_dev, ADRENO_REG_CP_PREEMPT_LEVEL_STATUS, &status);