Merge "usb: dwc3: Improve lfps handshake interop by reducing u3 exit time" (3f6f40ce) · Commits · e / devices / android_kernel_xiaomi_sm6125

drivers/usb/dwc3/core.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -660,6 +660,7 @@ static bool dwc3_core_is_valid(struct dwc3 *dwc)
		/* Detected DWC_usb31 IP */
		dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER);
		dwc->revision \|= DWC3_REVISION_IS_DWC31;
		dwc->versiontype = dwc3_readl(dwc->regs, DWC3_VER_TYPE);
		} else {
		return false;
		}

drivers/usb/dwc3/core.h

+10 −0

Original line number	Diff line number	Diff line
		@@ -160,6 +160,11 @@
		#define DWC3_OSTS 0xcc10

		/* DWC 3.1 Link Registers */
		#define DWC31_LINK_LU3LFPSRXTIM(n) (0xd010 + ((n) * 0x80))
		#define GEN2_U3_EXIT_RSP_RX_CLK(n) ((n) << 16)
		#define GEN2_U3_EXIT_RSP_RX_CLK_MASK GEN2_U3_EXIT_RSP_RX_CLK(0xff)
		#define GEN1_U3_EXIT_RSP_RX_CLK(n) (n)
		#define GEN1_U3_EXIT_RSP_RX_CLK_MASK GEN1_U3_EXIT_RSP_RX_CLK(0xff)
		#define DWC31_LINK_GDBGLTSSM 0xd050

		/* Bit fields */
		@@ -1061,6 +1066,11 @@ struct dwc3 {
		#define DWC3_REVISION_IS_DWC31 0x80000000
		#define DWC3_USB31_REVISION_110A (0x3131302a \| DWC3_REVISION_IS_DWC31)
		#define DWC3_USB31_REVISION_120A (0x3132302a \| DWC3_REVISION_IS_DWC31)
		#define DWC3_USB31_REVISION_170A (0x3137302a \| DWC3_REVISION_IS_DWC31)

		/* valid only for dwc31 configuraitons */
		u32 versiontype;
		#define DWC3_USB31_VER_TYPE_EA06 0x65613036

		enum dwc3_ep0_next ep0_next_event;
		enum dwc3_ep0_state ep0state;

drivers/usb/dwc3/dwc3-msm.c

+31 −0

Original line number	Diff line number	Diff line
		@@ -3734,6 +3734,21 @@ static int dwc3_otg_start_host(struct dwc3_msm *mdwc, int on)
		mdwc->in_host_mode = true;
		dwc3_usb3_phy_suspend(dwc, true);

		/* Reduce the U3 exit handshake timer from 8us to approximately
		* 300ns to avoid lfps handshake interoperability issues
		*/
		if (dwc->revision == DWC3_USB31_REVISION_170A) {
		dwc3_msm_write_reg_field(mdwc->base,
		DWC31_LINK_LU3LFPSRXTIM(0),
		GEN2_U3_EXIT_RSP_RX_CLK_MASK, 6);
		dwc3_msm_write_reg_field(mdwc->base,
		DWC31_LINK_LU3LFPSRXTIM(0),
		GEN1_U3_EXIT_RSP_RX_CLK_MASK, 5);
		dev_dbg(mdwc->dev, "LU3:%08x\n",
		dwc3_msm_read_reg(mdwc->base,
		DWC31_LINK_LU3LFPSRXTIM(0)));
		}

		/* xHCI should have incremented child count as necessary */
		dbg_event(0xFF, "StrtHost psync",
		atomic_read(&mdwc->dev->power.usage_count));
		@@ -3840,6 +3855,22 @@ static int dwc3_otg_start_peripheral(struct dwc3_msm *mdwc, int on)
		dwc3_msm_block_reset(mdwc, false);
		dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE);
		mdwc->in_device_mode = true;

		/* Reduce the U3 exit handshake timer from 8us to approximately
		* 300ns to avoid lfps handshake interoperability issues
		*/
		if (dwc->revision == DWC3_USB31_REVISION_170A) {
		dwc3_msm_write_reg_field(mdwc->base,
		DWC31_LINK_LU3LFPSRXTIM(0),
		GEN2_U3_EXIT_RSP_RX_CLK_MASK, 6);
		dwc3_msm_write_reg_field(mdwc->base,
		DWC31_LINK_LU3LFPSRXTIM(0),
		GEN1_U3_EXIT_RSP_RX_CLK_MASK, 5);
		dev_dbg(mdwc->dev, "LU3:%08x\n",
		dwc3_msm_read_reg(mdwc->base,
		DWC31_LINK_LU3LFPSRXTIM(0)));
		}

		usb_gadget_vbus_connect(&dwc->gadget);
		#ifdef CONFIG_SMP
		mdwc->pm_qos_req_dma.type = PM_QOS_REQ_AFFINE_IRQ;

drivers/usb/dwc3/ep0.c

+0 −6

Original line number	Diff line number	Diff line
		@@ -682,12 +682,6 @@ static int dwc3_ep0_set_config(struct dwc3 dwc, struct usb_ctrlrequest ctrl)
		DWC3_ENDPOINTS_NUM); num += 2) {
		dep = dwc->eps[num];
		size = 0;
		/* Don't change TXFRAMNUM on usb31 version */
		if (dwc3_is_usb31(dwc))
		size = dwc3_readl(dwc->regs,
		DWC3_GTXFIFOSIZ(num >> 1)) &
		DWC31_GTXFIFOSIZ_TXFRAMNUM;

		dwc3_writel(dwc->regs,
		DWC3_GTXFIFOSIZ(num >> 1), size);
		dep->fifo_depth = 0;

drivers/usb/dwc3/gadget.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -270,6 +270,11 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 dwc, struct dwc3_ep dep)
		return -ENOMEM;
		}

		if ((dwc->revision == DWC3_USB31_REVISION_170A) &&
		(dwc->versiontype == DWC3_USB31_VER_TYPE_EA06) &&
		usb_endpoint_xfer_isoc(dep->endpoint.desc))
		fifo_size \|= DWC31_GTXFIFOSIZ_TXFRAMNUM;

		dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(dep->endpoint.ep_num),
		fifo_size);
		return 0;