Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 32fd6901 authored by Manuel Lauss's avatar Manuel Lauss Committed by Ralf Baechle
Browse files

MIPS: Alchemy: get rid of common/reset.c 



Implement reset / poweroff in the board code instead.  The peripheral reset
code is gone too since YAMON which all in-tree boards use does the same
work when it boots.

Signed-off-by: default avatarManuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: default avatarYoichi Yuasa <yuasa@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/783/
Patchwork: http://patchwork.linux-mips.org/patch/882/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 325f8a0a

arch/mips/alchemy/common/Makefile

+1 −2
Original line number Diff line number Diff line
@@ -5,8 +5,7 @@ 
# Makefile for the Alchemy Au1xx0 CPUs, generic files.

#



obj-y += prom.o time.o reset.o \

	clocks.o platform.o power.o setup.o \

obj-y += prom.o time.o clocks.o platform.o power.o setup.o \

	sleeper.o dma.o dbdma.o



obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += irq.o

arch/mips/alchemy/common/reset.c

deleted100644 → 0
+0 −185
Original line number Diff line number Diff line 
/*

 *

 * BRIEF MODULE DESCRIPTION

 *	Au1xx0 reset routines.

 *

 * Copyright 2001, 2006, 2008 MontaVista Software Inc.

 * Author: MontaVista Software, Inc. <source@mvista.com>

 *

 *  This program is free software; you can redistribute  it and/or modify it

 *  under  the terms of  the GNU General  Public License as published by the

 *  Free Software Foundation;  either version 2 of the  License, or (at your

 *  option) any later version.

 *

 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED

 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF

 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN

 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,

 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT

 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF

 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON

 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT

 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 *

 *  You should have received a copy of the  GNU General Public License along

 *  with this program; if not, write  to the Free Software Foundation, Inc.,

 *  675 Mass Ave, Cambridge, MA 02139, USA.

 */



#include <linux/gpio.h>



#include <asm/cacheflush.h>

#include <asm/mach-au1x00/au1000.h>



void au1000_restart(char *command)

{

	/* Set all integrated peripherals to disabled states */

	extern void board_reset(void);

	u32 prid = read_c0_prid();



	printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");



	switch (prid & 0xFF000000) {

	case 0x00000000: /* Au1000 */

		au_writel(0x02, 0xb0000010); /* ac97_enable */

		au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */

		asm("sync");

		au_writel(0x00, 0xb017fffc); /* usbh_enable */

		au_writel(0x00, 0xb0200058); /* usbd_enable */

		au_writel(0x00, 0xb0300040); /* ir_enable */

		au_writel(0x00, 0xb4004104); /* mac dma */

		au_writel(0x00, 0xb4004114); /* mac dma */

		au_writel(0x00, 0xb4004124); /* mac dma */

		au_writel(0x00, 0xb4004134); /* mac dma */

		au_writel(0x00, 0xb0520000); /* macen0 */

		au_writel(0x00, 0xb0520004); /* macen1 */

		au_writel(0x00, 0xb1000008); /* i2s_enable  */

		au_writel(0x00, 0xb1100100); /* uart0_enable */

		au_writel(0x00, 0xb1200100); /* uart1_enable */

		au_writel(0x00, 0xb1300100); /* uart2_enable */

		au_writel(0x00, 0xb1400100); /* uart3_enable */

		au_writel(0x02, 0xb1600100); /* ssi0_enable */

		au_writel(0x02, 0xb1680100); /* ssi1_enable */

		au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */

		au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */

		au_writel(0x00, 0xb1900028); /* sys_clksrc */

		au_writel(0x10, 0xb1900060); /* sys_cpupll */

		au_writel(0x00, 0xb1900064); /* sys_auxpll */

		au_writel(0x00, 0xb1900100); /* sys_pininputen */

		break;

	case 0x01000000: /* Au1500 */

		au_writel(0x02, 0xb0000010); /* ac97_enable */

		au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */

		asm("sync");

		au_writel(0x00, 0xb017fffc); /* usbh_enable */

		au_writel(0x00, 0xb0200058); /* usbd_enable */

		au_writel(0x00, 0xb4004104); /* mac dma */

		au_writel(0x00, 0xb4004114); /* mac dma */

		au_writel(0x00, 0xb4004124); /* mac dma */

		au_writel(0x00, 0xb4004134); /* mac dma */

		au_writel(0x00, 0xb1520000); /* macen0 */

		au_writel(0x00, 0xb1520004); /* macen1 */

		au_writel(0x00, 0xb1100100); /* uart0_enable */

		au_writel(0x00, 0xb1400100); /* uart3_enable */

		au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */

		au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */

		au_writel(0x00, 0xb1900028); /* sys_clksrc */

		au_writel(0x10, 0xb1900060); /* sys_cpupll */

		au_writel(0x00, 0xb1900064); /* sys_auxpll */

		au_writel(0x00, 0xb1900100); /* sys_pininputen */

		break;

	case 0x02000000: /* Au1100 */

		au_writel(0x02, 0xb0000010); /* ac97_enable */

		au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */

		asm("sync");

		au_writel(0x00, 0xb017fffc); /* usbh_enable */

		au_writel(0x00, 0xb0200058); /* usbd_enable */

		au_writel(0x00, 0xb0300040); /* ir_enable */

		au_writel(0x00, 0xb4004104); /* mac dma */

		au_writel(0x00, 0xb4004114); /* mac dma */

		au_writel(0x00, 0xb4004124); /* mac dma */

		au_writel(0x00, 0xb4004134); /* mac dma */

		au_writel(0x00, 0xb0520000); /* macen0 */

		au_writel(0x00, 0xb1000008); /* i2s_enable  */

		au_writel(0x00, 0xb1100100); /* uart0_enable */

		au_writel(0x00, 0xb1200100); /* uart1_enable */

		au_writel(0x00, 0xb1400100); /* uart3_enable */

		au_writel(0x02, 0xb1600100); /* ssi0_enable */

		au_writel(0x02, 0xb1680100); /* ssi1_enable */

		au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */

		au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */

		au_writel(0x00, 0xb1900028); /* sys_clksrc */

		au_writel(0x10, 0xb1900060); /* sys_cpupll */

		au_writel(0x00, 0xb1900064); /* sys_auxpll */

		au_writel(0x00, 0xb1900100); /* sys_pininputen */

		break;

	case 0x03000000: /* Au1550 */

		au_writel(0x00, 0xb1a00004); /* psc 0 */

		au_writel(0x00, 0xb1b00004); /* psc 1 */

		au_writel(0x00, 0xb0a00004); /* psc 2 */

		au_writel(0x00, 0xb0b00004); /* psc 3 */

		au_writel(0x00, 0xb017fffc); /* usbh_enable */

		au_writel(0x00, 0xb0200058); /* usbd_enable */

		au_writel(0x00, 0xb4004104); /* mac dma */

		au_writel(0x00, 0xb4004114); /* mac dma */

		au_writel(0x00, 0xb4004124); /* mac dma */

		au_writel(0x00, 0xb4004134); /* mac dma */

		au_writel(0x00, 0xb1520000); /* macen0 */

		au_writel(0x00, 0xb1520004); /* macen1 */

		au_writel(0x00, 0xb1100100); /* uart0_enable */

		au_writel(0x00, 0xb1200100); /* uart1_enable */

		au_writel(0x00, 0xb1400100); /* uart3_enable */

		au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */

		au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */

		au_writel(0x00, 0xb1900028); /* sys_clksrc */

		au_writel(0x10, 0xb1900060); /* sys_cpupll */

		au_writel(0x00, 0xb1900064); /* sys_auxpll */

		au_writel(0x00, 0xb1900100); /* sys_pininputen */

		break;

	}



	set_c0_status(ST0_BEV | ST0_ERL);

	change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);

	flush_cache_all();

	write_c0_wired(0);



	/* Give board a chance to do a hardware reset */

	board_reset();



	/* Jump to the beggining in case board_reset() is empty */

	__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));

}



void au1000_halt(void)

{

#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)

	/* Power off system */

	printk(KERN_NOTICE "\n** Powering off...\n");

	au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C);

	au_sync();

	while (1); /* should not get here */

#else

	printk(KERN_NOTICE "\n** You can safely turn off the power\n");

#ifdef CONFIG_MIPS_MIRAGE

	gpio_direction_output(210, 1);

#endif

#ifdef CONFIG_PM

	au_sleep();



	/* Should not get here */

	printk(KERN_ERR "Unable to put CPU in sleep mode\n");

	while (1);

#else

	while (1)

		__asm__(".set\tmips3\n\t"

	                "wait\n\t"

			".set\tmips0");

#endif

#endif /* defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) */

}



void au1000_power_off(void)

{

	au1000_halt();

}

arch/mips/alchemy/common/setup.c

+0 −9
Original line number Diff line number Diff line
@@ -29,18 +29,13 @@ 
#include <linux/ioport.h>

#include <linux/jiffies.h>

#include <linux/module.h>

#include <linux/pm.h>



#include <asm/mipsregs.h>

#include <asm/reboot.h>

#include <asm/time.h>



#include <au1000.h>



extern void __init board_setup(void);

extern void au1000_restart(char *);

extern void au1000_halt(void);

extern void au1000_power_off(void);

extern void set_cpuspec(void);



void __init plat_mem_setup(void)
@@ -57,10 +52,6 @@ void __init plat_mem_setup(void) 
	/* this is faster than wasting cycles trying to approximate it */

	preset_lpj = (est_freq >> 1) / HZ;



	_machine_restart = au1000_restart;

	_machine_halt = au1000_halt;

	pm_power_off = au1000_power_off;



	board_setup();  /* board specific setup */



	if (au1xxx_cpu_needs_config_od())

arch/mips/alchemy/devboards/db1200/setup.c

+0 −19
Original line number Diff line number Diff line
@@ -9,30 +9,15 @@ 
#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/pm.h>

#include <asm/mach-au1x00/au1000.h>

#include <asm/mach-db1x00/bcsr.h>

#include <asm/mach-db1x00/db1200.h>

#include <asm/processor.h>

#include <asm/reboot.h>



const char *get_system_type(void)

{

	return "Alchemy Db1200";

}



static void board_power_off(void)

{

	bcsr_write(BCSR_RESETS, 0);

	bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF | BCSR_SYSTEM_RESET);

}



void board_reset(void)

{

	bcsr_write(BCSR_RESETS, 0);

	bcsr_write(BCSR_SYSTEM, 0);

}



void __init board_setup(void)

{

	unsigned long freq0, clksrc, div, pfc;
@@ -73,10 +58,6 @@ void __init board_setup(void) 
	clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;

	__raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);

	wmb();



	pm_power_off = board_power_off;

	_machine_halt = board_power_off;

	_machine_restart = (void(*)(char *))board_reset;

}



/* use the hexleds to count the number of times the cpu has entered

arch/mips/alchemy/devboards/db1x00/board_setup.c

+41 −8
Original line number Diff line number Diff line
@@ -30,11 +30,13 @@ 
#include <linux/gpio.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/pm.h>



#include <asm/mach-au1x00/au1000.h>

#include <asm/mach-au1x00/au1xxx_eth.h>

#include <asm/mach-db1x00/db1x00.h>

#include <asm/mach-db1x00/bcsr.h>

#include <asm/reboot.h>



#include <prom.h>
@@ -43,6 +45,18 @@ char irq_tab_alchemy[][5] __initdata = { 
	[12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371   */

	[13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */

};



static void bosporus_power_off(void)

{

	printk(KERN_INFO "It's now safe to turn off power\n");

	while (1)

		asm volatile (".set mips3 ; wait ; .set mips0");

}



const char *get_system_type(void)

{

	return "Alchemy Bosporus Gateway Reference";

}

#endif



/*
@@ -73,6 +87,16 @@ char irq_tab_alchemy[][5] __initdata = { 
	[12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */

	[13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */

};



static void mirage_power_off(void)

{

	alchemy_gpio_direction_output(210, 1);

}



const char *get_system_type(void)

{

	return "Alchemy Mirage";

}

#endif



#ifdef CONFIG_MIPS_DB1550
@@ -83,19 +107,19 @@ char irq_tab_alchemy[][5] __initdata = { 
};

#endif



const char *get_system_type(void)

#if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)

static void mips_softreset(void)

{

#ifdef CONFIG_MIPS_BOSPORUS

	return "Alchemy Bosporus Gateway Reference";

#else

	return "Alchemy Db1x00";

#endif

	asm volatile ("jr\t%0" : : "r"(0xbfc00000));

}



void board_reset(void)

#else



const char *get_system_type(void)

{

	bcsr_write(BCSR_SYSTEM, 0);

	return "Alchemy Db1x00";

}

#endif



void __init board_setup(void)

{
@@ -196,8 +220,17 @@ void __init board_setup(void) 
	 * be part of the audio driver.

	 */

	alchemy_gpio_direction_output(209, 1);



	pm_power_off = mirage_power_off;

	_machine_halt = mirage_power_off;

	_machine_restart = (void(*)(char *))mips_softreset;

#endif



#ifdef CONFIG_MIPS_BOSPORUS

	pm_power_off = bosporus_power_off;

	_machine_halt = bosporus_power_off;

	_machine_restart = (void(*)(char *))mips_softreset;

#endif

	au_sync();

}