Loading arch/arm64/boot/dts/qcom/atoll-npu.dtsi +10 −9 Original line number Diff line number Diff line Loading @@ -17,8 +17,9 @@ reg = <0x9900000 0x20000>, <0x99f0000 0x10000>, <0x9980000 0x10000>, <0x17c00000 0x10000>; reg-names = "tcm", "core", "cc", "apss_shared"; <0x17c00000 0x10000>, <0x01f40000 0x40000>; reg-names = "tcm", "core", "cc", "apss_shared", "tcsr"; interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 585 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 588 IRQ_TYPE_EDGE_RISING>, Loading Loading @@ -75,8 +76,8 @@ 100000000 200000000 200000000 120000000 40000000 150000000 30000000 200000000 19200000 50000000 Loading @@ -94,7 +95,7 @@ 400000000 400000000 200000000 40000000 37500000 300000000 19200000 50000000 Loading @@ -112,8 +113,8 @@ 515000000 515000000 300000000 75000000 400000000 37500000 403000000 19200000 50000000 19200000 Loading @@ -135,7 +136,7 @@ 19200000 100000000 19200000 515000000 650000000 19200000 660000000>; }; Loading @@ -153,7 +154,7 @@ 19200000 100000000 19200000 650000000 800000000 19200000 800000000>; }; Loading Loading
arch/arm64/boot/dts/qcom/atoll-npu.dtsi +10 −9 Original line number Diff line number Diff line Loading @@ -17,8 +17,9 @@ reg = <0x9900000 0x20000>, <0x99f0000 0x10000>, <0x9980000 0x10000>, <0x17c00000 0x10000>; reg-names = "tcm", "core", "cc", "apss_shared"; <0x17c00000 0x10000>, <0x01f40000 0x40000>; reg-names = "tcm", "core", "cc", "apss_shared", "tcsr"; interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 585 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 588 IRQ_TYPE_EDGE_RISING>, Loading Loading @@ -75,8 +76,8 @@ 100000000 200000000 200000000 120000000 40000000 150000000 30000000 200000000 19200000 50000000 Loading @@ -94,7 +95,7 @@ 400000000 400000000 200000000 40000000 37500000 300000000 19200000 50000000 Loading @@ -112,8 +113,8 @@ 515000000 515000000 300000000 75000000 400000000 37500000 403000000 19200000 50000000 19200000 Loading @@ -135,7 +136,7 @@ 19200000 100000000 19200000 515000000 650000000 19200000 660000000>; }; Loading @@ -153,7 +154,7 @@ 19200000 100000000 19200000 650000000 800000000 19200000 800000000>; }; Loading