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Commit 2cf1b5ce authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-fixes'



Jiri Pirko says:

====================
mlxsw: Couple of fixes/adjustments

Ido Schimmel (5):
  mlxsw: Call free_netdev when removing port
  mlxsw: Make system port to local port mapping explicit
  mlxsw: Simplify mlxsw_sx_port_xmit function
  mlxsw: Use correct skb length when dumping payload
  mlxsw: Fix use-after-free bug in mlxsw_sx_port_xmit

Jiri Pirko (2):
  mlxsw: Make pci module dependent on HAS_DMA and HAS_IOMEM
  mlxsw: Strip FCS from incoming packets
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents ecea4991 e577516b
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+1 −1
Original line number Original line Diff line number Diff line
@@ -12,7 +12,7 @@ config MLXSW_CORE


config MLXSW_PCI
config MLXSW_PCI
	tristate "PCI bus implementation for Mellanox Technologies Switch ASICs"
	tristate "PCI bus implementation for Mellanox Technologies Switch ASICs"
	depends on PCI && MLXSW_CORE
	depends on PCI && HAS_DMA && HAS_IOMEM && MLXSW_CORE
	default m
	default m
	---help---
	---help---
	  This is PCI bus implementation for Mellanox Technologies Switch ASICs.
	  This is PCI bus implementation for Mellanox Technologies Switch ASICs.
+11 −1
Original line number Original line Diff line number Diff line
@@ -865,6 +865,16 @@ static struct mlxsw_core *__mlxsw_core_get(void *driver_priv)
	return container_of(driver_priv, struct mlxsw_core, driver_priv);
	return container_of(driver_priv, struct mlxsw_core, driver_priv);
}
}


bool mlxsw_core_skb_transmit_busy(void *driver_priv,
				  const struct mlxsw_tx_info *tx_info)
{
	struct mlxsw_core *mlxsw_core = __mlxsw_core_get(driver_priv);

	return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
						  tx_info);
}
EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);

int mlxsw_core_skb_transmit(void *driver_priv, struct sk_buff *skb,
int mlxsw_core_skb_transmit(void *driver_priv, struct sk_buff *skb,
			    const struct mlxsw_tx_info *tx_info)
			    const struct mlxsw_tx_info *tx_info)
{
{
@@ -1063,7 +1073,7 @@ static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
			mlxsw_core->emad.tid - 1);
			mlxsw_core->emad.tid - 1);
		mlxsw_core_buf_dump_dbg(mlxsw_core,
		mlxsw_core_buf_dump_dbg(mlxsw_core,
					mlxsw_core->emad.resp_skb->data,
					mlxsw_core->emad.resp_skb->data,
					skb->len);
					mlxsw_core->emad.resp_skb->len);


		dev_kfree_skb(mlxsw_core->emad.resp_skb);
		dev_kfree_skb(mlxsw_core->emad.resp_skb);
	}
	}
+5 −0
Original line number Original line Diff line number Diff line
@@ -73,6 +73,9 @@ struct mlxsw_tx_info {
	bool is_emad;
	bool is_emad;
};
};


bool mlxsw_core_skb_transmit_busy(void *driver_priv,
				  const struct mlxsw_tx_info *tx_info);

int mlxsw_core_skb_transmit(void *driver_priv, struct sk_buff *skb,
int mlxsw_core_skb_transmit(void *driver_priv, struct sk_buff *skb,
			    const struct mlxsw_tx_info *tx_info);
			    const struct mlxsw_tx_info *tx_info);


@@ -177,6 +180,8 @@ struct mlxsw_bus {
	int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
	int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_config_profile *profile);
		    const struct mlxsw_config_profile *profile);
	void (*fini)(void *bus_priv);
	void (*fini)(void *bus_priv);
	bool (*skb_transmit_busy)(void *bus_priv,
				  const struct mlxsw_tx_info *tx_info);
	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
			    const struct mlxsw_tx_info *tx_info);
			    const struct mlxsw_tx_info *tx_info);
	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
+20 −6
Original line number Original line Diff line number Diff line
@@ -667,6 +667,7 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci,
	char *wqe;
	char *wqe;
	struct sk_buff *skb;
	struct sk_buff *skb;
	struct mlxsw_rx_info rx_info;
	struct mlxsw_rx_info rx_info;
	u16 byte_count;
	int err;
	int err;


	elem_info = mlxsw_pci_queue_elem_info_consumer_get(q);
	elem_info = mlxsw_pci_queue_elem_info_consumer_get(q);
@@ -686,7 +687,10 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci,
	rx_info.sys_port = mlxsw_pci_cqe_system_port_get(cqe);
	rx_info.sys_port = mlxsw_pci_cqe_system_port_get(cqe);
	rx_info.trap_id = mlxsw_pci_cqe_trap_id_get(cqe);
	rx_info.trap_id = mlxsw_pci_cqe_trap_id_get(cqe);


	skb_put(skb, mlxsw_pci_cqe_byte_count_get(cqe));
	byte_count = mlxsw_pci_cqe_byte_count_get(cqe);
	if (mlxsw_pci_cqe_crc_get(cqe))
		byte_count -= ETH_FCS_LEN;
	skb_put(skb, byte_count);
	mlxsw_core_skb_receive(mlxsw_pci->core, skb, &rx_info);
	mlxsw_core_skb_receive(mlxsw_pci->core, skb, &rx_info);


put_new_skb:
put_new_skb:
@@ -1439,6 +1443,15 @@ mlxsw_pci_sdq_pick(struct mlxsw_pci *mlxsw_pci,
	return mlxsw_pci_sdq_get(mlxsw_pci, sdqn);
	return mlxsw_pci_sdq_get(mlxsw_pci, sdqn);
}
}


static bool mlxsw_pci_skb_transmit_busy(void *bus_priv,
					const struct mlxsw_tx_info *tx_info)
{
	struct mlxsw_pci *mlxsw_pci = bus_priv;
	struct mlxsw_pci_queue *q = mlxsw_pci_sdq_pick(mlxsw_pci, tx_info);

	return !mlxsw_pci_queue_elem_info_producer_get(q);
}

static int mlxsw_pci_skb_transmit(void *bus_priv, struct sk_buff *skb,
static int mlxsw_pci_skb_transmit(void *bus_priv, struct sk_buff *skb,
				  const struct mlxsw_tx_info *tx_info)
				  const struct mlxsw_tx_info *tx_info)
{
{
@@ -1624,6 +1637,7 @@ static const struct mlxsw_bus mlxsw_pci_bus = {
	.kind			= "pci",
	.kind			= "pci",
	.init			= mlxsw_pci_init,
	.init			= mlxsw_pci_init,
	.fini			= mlxsw_pci_fini,
	.fini			= mlxsw_pci_fini,
	.skb_transmit_busy	= mlxsw_pci_skb_transmit_busy,
	.skb_transmit		= mlxsw_pci_skb_transmit,
	.skb_transmit		= mlxsw_pci_skb_transmit,
	.cmd_exec		= mlxsw_pci_cmd_exec,
	.cmd_exec		= mlxsw_pci_cmd_exec,
};
};
+6 −0
Original line number Original line Diff line number Diff line
@@ -155,6 +155,12 @@ MLXSW_ITEM32(pci, cqe, byte_count, 0x04, 0, 14);
 */
 */
MLXSW_ITEM32(pci, cqe, trap_id, 0x08, 0, 8);
MLXSW_ITEM32(pci, cqe, trap_id, 0x08, 0, 8);


/* pci_cqe_crc
 * Length include CRC. Indicates the length field includes
 * the packet's CRC.
 */
MLXSW_ITEM32(pci, cqe, crc, 0x0C, 8, 1);

/* pci_cqe_e
/* pci_cqe_e
 * CQE with Error.
 * CQE with Error.
 */
 */
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