Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 29cc3730 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'x86_queue_for_3.19' of... 

Merge tag 'x86_queue_for_3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

 into x86/cleanups

Pull two minor cleanups from Borislav Petkov.

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 890ca861 6f9b63a0

arch/x86/kernel/cpu/amd.c

+11 −12
Original line number Original line Diff line number Diff line
@@ -566,6 +566,17 @@ static void init_amd_k8(struct cpuinfo_x86 *c) 




	if (!c->x86_model_id[0])

	if (!c->x86_model_id[0])

		strcpy(c->x86_model_id, "Hammer");

		strcpy(c->x86_model_id, "Hammer");



#ifdef CONFIG_SMP

	/*

	 * Disable TLB flush filter by setting HWCR.FFDIS on K8

	 * bit 6 of msr C001_0015

	 *

	 * Errata 63 for SH-B3 steppings

	 * Errata 122 for all steppings (F+ have it disabled by default)

	 */

	msr_set_bit(MSR_K7_HWCR, 6);

#endif

}

}





static void init_amd_gh(struct cpuinfo_x86 *c)

static void init_amd_gh(struct cpuinfo_x86 *c)
@@ -636,18 +647,6 @@ static void init_amd(struct cpuinfo_x86 *c) 
{

{

	u32 dummy;

	u32 dummy;





#ifdef CONFIG_SMP

	/*

	 * Disable TLB flush filter by setting HWCR.FFDIS on K8

	 * bit 6 of msr C001_0015

	 *

	 * Errata 63 for SH-B3 steppings

	 * Errata 122 for all steppings (F+ have it disabled by default)

	 */

	if (c->x86 == 0xf)

		msr_set_bit(MSR_K7_HWCR, 6);

#endif



	early_init_amd(c);

	early_init_amd(c);





	/*

	/*

arch/x86/kernel/espfix_64.c

+0 −3
Original line number Original line Diff line number Diff line
@@ -122,9 +122,6 @@ static void init_espfix_random(void) 
void __init init_espfix_bsp(void)

void __init init_espfix_bsp(void)

{

{

	pgd_t *pgd_p;

	pgd_t *pgd_p;

	pteval_t ptemask;



	ptemask = __supported_pte_mask;





	/* Install the espfix pud into the kernel page directory */

	/* Install the espfix pud into the kernel page directory */

	pgd_p = &init_level4_pgt[pgd_index(ESPFIX_BASE_ADDR)];

	pgd_p = &init_level4_pgt[pgd_index(ESPFIX_BASE_ADDR)];