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Commit 1eb0d559 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: pwm: Enable pwm driver"

parents 60a19cac f010603d

Documentation/devicetree/bindings/pwm/pwm-qcom.txt

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Qualcomm Technologies Inc. PWM controller



PDM is used for generating density modulated signals that, after passing

through a filter, become analog signals. It can produce fixed densities

or alternate between densities to create variations in the analog signal.



PWM has the following use:

1) Duty cycle control of the backlight.





Required properties:

- compatible: should be "qcom,pdm-pwm"



- reg: physical base address and length of the controller's registers.



- clocks: clocks required for enabling PWM block.



- #pwm-cells: shall contain 2.



- pwm@<num> : defines pwm instances.



- frame-index : each pwm has 10 frames 0-9 and they are designed to stand by

		themselves independent of the other frame. For this reason,

		each PWM instance has its own set of configuration registers.

- frame-offset: offset of each pwm instance from base.



Example:



	pdm_pwm0: pdm_pwm_test@600000 {

		compatible = "qcom,pdm-pwm";

		reg = <0x600000 0xc000>;

		clocks = <&clock_gcc GCC_PDM_AHB_CLK>,

			<&clock_gcc GCC_PWM0_XO512_CLK>;

		clock-names = "pdm_ahb_clk", "pwm_core_clk";

		#pwm-cells = <2>;



		pwm@0{

			frame-index = <0>;

			frame-offset = <0x1000>;

		};

	};

arch/arm64/boot/dts/qcom/qcs405.dtsi

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@@ -300,6 +300,153 @@ 
		clock-frequency = <32768>;

	};



	pdm_pwm0: pdm_pwm_test@600000 {

		compatible = "qcom,pdm-pwm";

		reg = <0x600000 0xc000>;

		clocks = <&clock_gcc GCC_PDM_AHB_CLK>,

			<&clock_gcc GCC_PWM0_XO512_CLK>;

		clock-names = "pdm_ahb_clk", "pwm_core_clk";

		#pwm-cells = <2>;

		pwm@0{

			frame-index = <0>;

			frame-offset = <0x1000>;

		};

		pwm@1{

			frame-index = <1>;

			frame-offset = <0x2000>;

		};

		pwm@2{

			frame-index = <2>;

			frame-offset = <0x3000>;

		};

		pwm@3{

			frame-index = <3>;

			frame-offset = <0x4000>;

		};

		pwm@4{

			frame-index = <4>;

			frame-offset = <0x5000>;

		};

		pwm@5{

			frame-index = <5>;

			frame-offset = <0x6000>;

		};

		pwm@6{

			frame-index = <6>;

			frame-offset = <0x7000>;

		};

		pwm@7{

			frame-index = <7>;

			frame-offset = <0x8000>;

		};

		pwm@8{

			frame-index = <8>;

			frame-offset = <0x9000>;

		};

		pwm@9{

			frame-index = <9>;

			frame-offset = <0xA000>;

		};

	};



	pdm_pwm1: pdm_pwm_test@614000 {

		compatible = "qcom,pdm-pwm";

		reg = <0x614000 0xc000>;

		clocks = <&clock_gcc GCC_PDM_AHB_CLK>,

			<&clock_gcc GCC_PWM1_XO512_CLK>;

		clock-names = "pdm_ahb_clk", "pwm_core_clk";

		#pwm-cells = <2>;

		pwm@0{

			frame-index = <0>;

			frame-offset = <0x1000>;

		};

		pwm@1{

			frame-index = <1>;

			frame-offset = <0x2000>;

		};

		pwm@2{

			frame-index = <2>;

			frame-offset = <0x3000>;

		};

		pwm@3{

			frame-index = <3>;

			frame-offset = <0x4000>;

		};

		pwm@4{

			frame-index = <4>;

			frame-offset = <0x5000>;

		};

		pwm@5{

			frame-index = <5>;

			frame-offset = <0x6000>;

		};

		pwm@6{

			frame-index = <6>;

			frame-offset = <0x7000>;

		};

		pwm@7{

			frame-index = <7>;

			frame-offset = <0x8000>;

		};

		pwm@8{

			frame-index = <8>;

			frame-offset = <0x9000>;

		};

		pwm@9{

			frame-index = <9>;

			frame-offset = <0xA000>;

		};

	};



	pdm_pwm2: pdm_pwm_test@628000 {

		compatible = "qcom,pdm-pwm";

		reg = <0x628000 0xc000>;

		clocks = <&clock_gcc GCC_PDM_AHB_CLK>,

			<&clock_gcc GCC_PWM2_XO512_CLK>;

		clock-names = "pdm_ahb_clk", "pwm_core_clk";

		#pwm-cells = <2>;

		pwm@0{

			frame-index = <0>;

			frame-offset = <0x1000>;

		};

		pwm@1{

			frame-index = <1>;

			frame-offset = <0x2000>;

		};

		pwm@2{

			frame-index = <2>;

			frame-offset = <0x3000>;

		};

		pwm@3{

			frame-index = <3>;

			frame-offset = <0x4000>;

		};

		pwm@4{

			frame-index = <4>;

			frame-offset = <0x5000>;

		};

		pwm@5{

			frame-index = <5>;

			frame-offset = <0x6000>;

		};

		pwm@6{

			frame-index = <6>;

			frame-offset = <0x7000>;

		};

		pwm@7{

			frame-index = <7>;

			frame-offset = <0x8000>;

		};

		pwm@8{

			frame-index = <8>;

			frame-offset = <0x9000>;

		};

		pwm@9{

			frame-index = <9>;

			frame-offset = <0xA000>;

		};

	};



	clock_rpmcc: qcom,rpmcc {

		compatible = "qcom,rpmcc-qcs405";

		#clock-cells = <1>;

arch/arm64/configs/vendor/qcs405_defconfig

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@@ -502,6 +502,7 @@ CONFIG_EXTCON_USB_GPIO=y 
CONFIG_IIO=y

CONFIG_QCOM_SPMI_ADC5=y

CONFIG_PWM=y

CONFIG_PWM_QCOM=y

CONFIG_PWM_QTI_LPG=y

CONFIG_QCOM_KGSL=y

CONFIG_QTI_MPM=y

drivers/pwm/Kconfig

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@@ -360,6 +360,16 @@ config PWM_RCAR 
	  To compile this driver as a module, choose M here: the module

	  will be called pwm-rcar.



config PWM_QCOM

	tristate "Qualcomm Technologies, Inc. PWM support"

	depends on ARCH_QCOM

	help

	  Generic PWM framework driver for the PWM controller found on

	  Qualcomm Technologies Inc. SoCs.



	  To compile this driver as a module, choose M here: the module

	  will be called pwm-qcom.



config PWM_QTI_LPG

	tristate "Qualcomm Technologies, Inc. LPG driver"

	depends on  MFD_SPMI_PMIC && OF

drivers/pwm/Makefile

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@@ -34,6 +34,7 @@ obj-$(CONFIG_PWM_OMAP_DMTIMER) += pwm-omap-dmtimer.o 
obj-$(CONFIG_PWM_PCA9685)	+= pwm-pca9685.o

obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o

obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o

obj-$(CONFIG_PWM_QCOM)		+= pwm-qcom.o

obj-$(CONFIG_PWM_RCAR)		+= pwm-rcar.o

obj-$(CONFIG_PWM_QTI_LPG)	+= pwm-qti-lpg.o

obj-$(CONFIG_PWM_RENESAS_TPU)	+= pwm-renesas-tpu.o