Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1bfcb2e2 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge changes I3461eab4,I9f3faa08,I1d09dbe7 into msm-4.14

* changes:
  defconfig: Enable Core defconfig for various drivers
  defconfig: Enable pinctrl config for SDMSHRIKE target
  pinctrl: sdmshrike: correct the offsets for UFS and SDC pins
parents 3abd9f0d 65beb177
Loading
Loading
Loading
Loading
+37 −1
Original line number Diff line number Diff line
@@ -187,6 +187,8 @@ CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_GACT=y
CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BT=y
CONFIG_CFG80211=y
CONFIG_CFG80211_INTERNAL_REGDB=y
@@ -233,12 +235,19 @@ CONFIG_INPUT_UINPUT=y
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVMEM is not set
CONFIG_SERIAL_MSM_GENI=y
CONFIG_HW_RANDOM=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QCOM_GENI=y
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_QCOM_GENI=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SLIMBUS=y
CONFIG_SLIMBUS_MSM_NGD=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
CONFIG_PINCTRL_SDMSHRIKE=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET_XGENE=y
CONFIG_POWER_RESET_SYSCON=y
@@ -276,18 +285,34 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MSM=y
CONFIG_USB_ISP1760=y
CONFIG_USB_ISP1760_HOST_ROLE=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_QCOM_EMU_PHY=y
CONFIG_USB_MSM_SSPHY_QMP=y
CONFIG_MSM_HSUSB_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_MTP=y
CONFIG_USB_CONFIGFS_F_PTP=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
CONFIG_USB_CONFIGFS_F_GSI=y
CONFIG_USB_CONFIGFS_F_QDSS=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_TEST=y
CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
CONFIG_MMC_TEST=m
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_CLKGATE=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_MSM=y
@@ -298,6 +323,7 @@ CONFIG_UIO_MSM_SHAREDMEM=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ION=y
CONFIG_QCOM_GENI_SE=y
CONFIG_MSM_CLK_AOP_QMP=y
CONFIG_MSM_NPUCC_SDM855=y
CONFIG_CLOCK_CPU_OSM=y
@@ -308,16 +334,25 @@ CONFIG_MSM_GCC_SDMSHRIKE=y
CONFIG_MSM_CAMCC_SDMSHRIKE=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_QCOM_APCS_IPC=y
CONFIG_MSM_QMP=y
CONFIG_ARM_SMMU=y
CONFIG_QCOM_LAZY_MAPPING=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_QCOM_QMI_HELPERS=y
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMP2P=y
CONFIG_QCOM_SMSM=y
CONFIG_QCOM_BUS_SCALING=y
CONFIG_QCOM_BUS_CONFIG_RPMH=y
CONFIG_QCOM_COMMAND_DB=y
CONFIG_QTI_RPMH_API=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_QTI_PDC_SDM855=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT2_FS=y
@@ -339,6 +374,7 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_IPC_LOGGING=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_SECURITY=y
CONFIG_SECURITY_SELINUX=y
+41 −1
Original line number Diff line number Diff line
@@ -194,6 +194,8 @@ CONFIG_NET_ACT_GACT=y
CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_DNS_RESOLVER=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BT=y
CONFIG_CFG80211=y
CONFIG_CFG80211_INTERNAL_REGDB=y
@@ -239,13 +241,23 @@ CONFIG_INPUT_UINPUT=y
# CONFIG_SERIO_SERPORT is not set
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_MSM_GENI=y
CONFIG_SERIAL_MSM_GENI_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_TTY_PRINTK=y
CONFIG_HVC_DCC=y
CONFIG_HW_RANDOM=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QCOM_GENI=y
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_QCOM_GENI=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SLIMBUS=y
CONFIG_SLIMBUS_MSM_NGD=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
CONFIG_PINCTRL_SDMSHRIKE=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET_XGENE=y
CONFIG_POWER_RESET_SYSCON=y
@@ -282,18 +294,35 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MSM=y
CONFIG_USB_ISP1760=y
CONFIG_USB_ISP1760_HOST_ROLE=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_QCOM_EMU_PHY=y
CONFIG_USB_MSM_SSPHY_QMP=y
CONFIG_MSM_HSUSB_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_MTP=y
CONFIG_USB_CONFIGFS_F_PTP=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
CONFIG_USB_CONFIGFS_F_GSI=y
CONFIG_USB_CONFIGFS_F_QDSS=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_TEST=y
CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
CONFIG_MMC_TEST=m
CONFIG_MMC_RING_BUFFER=y
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_CLKGATE=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_MSM=y
@@ -305,6 +334,7 @@ CONFIG_UIO_MSM_SHAREDMEM=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ION=y
CONFIG_QCOM_GENI_SE=y
CONFIG_MSM_CLK_AOP_QMP=y
CONFIG_MSM_NPUCC_SDM855=y
CONFIG_CLOCK_CPU_OSM=y
@@ -315,16 +345,25 @@ CONFIG_MSM_GCC_SDMSHRIKE=y
CONFIG_MSM_CAMCC_SDMSHRIKE=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_QCOM_APCS_IPC=y
CONFIG_MSM_QMP=y
CONFIG_ARM_SMMU=y
CONFIG_QCOM_LAZY_MAPPING=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_QCOM_QMI_HELPERS=y
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMP2P=y
CONFIG_QCOM_SMSM=y
CONFIG_QCOM_BUS_SCALING=y
CONFIG_QCOM_BUS_CONFIG_RPMH=y
CONFIG_QCOM_COMMAND_DB=y
CONFIG_QTI_RPMH_API=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_QTI_PDC_SDM855=y
CONFIG_PHY_XGENE=y
CONFIG_RAS=y
CONFIG_ANDROID=y
@@ -379,6 +418,7 @@ CONFIG_FAULT_INJECTION=y
CONFIG_FAIL_PAGE_ALLOC=y
CONFIG_FAULT_INJECTION_DEBUG_FS=y
CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
CONFIG_IPC_LOGGING=y
CONFIG_FUNCTION_TRACER=y
CONFIG_TRACER_SNAPSHOT=y
CONFIG_BLK_DEV_IO_TRACE=y
+4 −4
Original line number Diff line number Diff line
@@ -2227,10 +2227,10 @@ static const struct msm_pingroup sdmshrike_groups[] = {
	[187] = PINGROUP(187, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA),
	[188] = PINGROUP(188, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA),
	[189] = PINGROUP(189, SOUTH, dp_hot, NA, NA, NA, NA, NA, NA, NA, NA),
	[190] = SDC_QDSD_PINGROUP(sdc2_clk, 0xe72000, 14, 6),
	[191] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xe72000, 11, 3),
	[192] = SDC_QDSD_PINGROUP(sdc2_data, 0xe72000, 9, 0),
	[193] = UFS_RESET(ufs_reset, 0xc7004),
	[190] = SDC_QDSD_PINGROUP(sdc2_clk, 0x9b2000, 14, 6),
	[191] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x9b2000, 11, 3),
	[192] = SDC_QDSD_PINGROUP(sdc2_data, 0x9b2000, 9, 0),
	[193] = UFS_RESET(ufs_reset, 0xdb6004),
};

static const struct msm_pinctrl_soc_data sdmshrike_pinctrl = {