Loading drivers/gpu/drm/msm/dp/dp_display.c +4 −0 Original line number Diff line number Diff line Loading @@ -1297,6 +1297,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) } g_dp_display->is_mst_supported = dp->parser->has_mst; g_dp_display->no_mst_encoder = dp->parser->no_mst_encoder; dp->catalog = dp_catalog_get(dev, dp->parser); if (IS_ERR(dp->catalog)) { Loading Loading @@ -2700,6 +2701,9 @@ int dp_display_get_num_of_displays(void) int dp_display_get_num_of_streams(void) { if (g_dp_display->no_mst_encoder) return 0; return DP_STREAM_MAX; } Loading drivers/gpu/drm/msm/dp/dp_display.h +1 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ struct dp_display { u32 max_pclk_khz; u32 max_hdisplay; u32 max_vdisplay; u32 no_mst_encoder; void *dp_mst_prv_info; int (*enable)(struct dp_display *dp_display, void *panel); Loading drivers/gpu/drm/msm/dp/dp_parser.c +2 −0 Original line number Diff line number Diff line Loading @@ -726,6 +726,8 @@ static int dp_parser_mst(struct dp_parser *parser) parser->has_mst = of_property_read_bool(dev->of_node, "qcom,mst-enable"); parser->no_mst_encoder = of_property_read_bool(dev->of_node, "qcom,no-mst-encoder"); parser->has_mst_sideband = parser->has_mst; pr_debug("mst parsing successful. mst:%d\n", parser->has_mst); Loading drivers/gpu/drm/msm/dp/dp_parser.h +2 −0 Original line number Diff line number Diff line Loading @@ -197,6 +197,7 @@ static inline char *dp_phy_aux_config_type_to_string(u32 cfg_type) * @max_lclk_khz: maximum link clock supported for the platform * @max_hdisplay: maximum supported horizontal display by the platform for dp * @max_vdisplay: maximum supported vertical display by the platform for dp * @no_mst_encoder: zero mst encoders should be initialised for platform * @hw_cfg: DP HW specific settings * @has_mst: MST feature enable status * @has_mst_sideband: MST sideband feature enable status Loading Loading @@ -228,6 +229,7 @@ struct dp_parser { u32 max_lclk_khz; u32 max_hdisplay; u32 max_vdisplay; bool no_mst_encoder; struct dp_hw_cfg hw_cfg; bool has_mst; bool has_mst_sideband; Loading drivers/gpu/drm/msm/sde/sde_kms.c +2 −0 Original line number Diff line number Diff line Loading @@ -1527,6 +1527,7 @@ static int _sde_kms_setup_displays(struct drm_device *dev, sde_encoder_destroy(encoder); } } /* dp */ for (i = 0; i < sde_kms->dp_display_count && priv->num_encoders < max_encoders; ++i) { Loading Loading @@ -1573,6 +1574,7 @@ static int _sde_kms_setup_displays(struct drm_device *dev, /* update display cap to MST_MODE for DP MST encoders */ info.capabilities |= MSM_DISPLAY_CAP_MST_MODE; sde_kms->dp_stream_count = dp_display_get_num_of_streams(); for (idx = 0; idx < sde_kms->dp_stream_count; idx++) { info.h_tile_instance[0] = idx; encoder = sde_encoder_init(dev, &info); Loading Loading
drivers/gpu/drm/msm/dp/dp_display.c +4 −0 Original line number Diff line number Diff line Loading @@ -1297,6 +1297,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) } g_dp_display->is_mst_supported = dp->parser->has_mst; g_dp_display->no_mst_encoder = dp->parser->no_mst_encoder; dp->catalog = dp_catalog_get(dev, dp->parser); if (IS_ERR(dp->catalog)) { Loading Loading @@ -2700,6 +2701,9 @@ int dp_display_get_num_of_displays(void) int dp_display_get_num_of_streams(void) { if (g_dp_display->no_mst_encoder) return 0; return DP_STREAM_MAX; } Loading
drivers/gpu/drm/msm/dp/dp_display.h +1 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ struct dp_display { u32 max_pclk_khz; u32 max_hdisplay; u32 max_vdisplay; u32 no_mst_encoder; void *dp_mst_prv_info; int (*enable)(struct dp_display *dp_display, void *panel); Loading
drivers/gpu/drm/msm/dp/dp_parser.c +2 −0 Original line number Diff line number Diff line Loading @@ -726,6 +726,8 @@ static int dp_parser_mst(struct dp_parser *parser) parser->has_mst = of_property_read_bool(dev->of_node, "qcom,mst-enable"); parser->no_mst_encoder = of_property_read_bool(dev->of_node, "qcom,no-mst-encoder"); parser->has_mst_sideband = parser->has_mst; pr_debug("mst parsing successful. mst:%d\n", parser->has_mst); Loading
drivers/gpu/drm/msm/dp/dp_parser.h +2 −0 Original line number Diff line number Diff line Loading @@ -197,6 +197,7 @@ static inline char *dp_phy_aux_config_type_to_string(u32 cfg_type) * @max_lclk_khz: maximum link clock supported for the platform * @max_hdisplay: maximum supported horizontal display by the platform for dp * @max_vdisplay: maximum supported vertical display by the platform for dp * @no_mst_encoder: zero mst encoders should be initialised for platform * @hw_cfg: DP HW specific settings * @has_mst: MST feature enable status * @has_mst_sideband: MST sideband feature enable status Loading Loading @@ -228,6 +229,7 @@ struct dp_parser { u32 max_lclk_khz; u32 max_hdisplay; u32 max_vdisplay; bool no_mst_encoder; struct dp_hw_cfg hw_cfg; bool has_mst; bool has_mst_sideband; Loading
drivers/gpu/drm/msm/sde/sde_kms.c +2 −0 Original line number Diff line number Diff line Loading @@ -1527,6 +1527,7 @@ static int _sde_kms_setup_displays(struct drm_device *dev, sde_encoder_destroy(encoder); } } /* dp */ for (i = 0; i < sde_kms->dp_display_count && priv->num_encoders < max_encoders; ++i) { Loading Loading @@ -1573,6 +1574,7 @@ static int _sde_kms_setup_displays(struct drm_device *dev, /* update display cap to MST_MODE for DP MST encoders */ info.capabilities |= MSM_DISPLAY_CAP_MST_MODE; sde_kms->dp_stream_count = dp_display_get_num_of_streams(); for (idx = 0; idx < sde_kms->dp_stream_count; idx++) { info.h_tile_instance[0] = idx; encoder = sde_encoder_init(dev, &info); Loading