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Commit 17fa87fe authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 4.10-rc7 into char-misc-next 



We want the hv and other fixes in here as well to handle merge and
testing issues.

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parents 3b28f4f2 d5adbfcd

Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt

+3 −0
Original line number Original line Diff line number Diff line
@@ -15,6 +15,9 @@ Properties: 
  Second cell specifies the irq distribution mode to cores

  Second cell specifies the irq distribution mode to cores

     0=Round Robin; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3

     0=Round Robin; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3





  The second cell in interrupts property is deprecated and may be ignored by

  the kernel.



  intc accessed via the special ARC AUX register interface, hence "reg" property

  intc accessed via the special ARC AUX register interface, hence "reg" property

  is not specified.

  is not specified.

Documentation/devicetree/bindings/mtd/tango-nand.txt

+3 −3
Original line number Original line Diff line number Diff line
@@ -5,7 +5,7 @@ Required properties: 
- compatible: "sigma,smp8758-nand"

- compatible: "sigma,smp8758-nand"

- reg: address/size of nfc_reg, nfc_mem, and pbus_reg

- reg: address/size of nfc_reg, nfc_mem, and pbus_reg

- dmas: reference to the DMA channel used by the controller

- dmas: reference to the DMA channel used by the controller

- dma-names: "nfc_sbox"

- dma-names: "rxtx"

- clocks: reference to the system clock

- clocks: reference to the system clock

- #address-cells: <1>

- #address-cells: <1>

- #size-cells: <0>

- #size-cells: <0>
@@ -17,9 +17,9 @@ Example: 




	nandc: nand-controller@2c000 {

	nandc: nand-controller@2c000 {

		compatible = "sigma,smp8758-nand";

		compatible = "sigma,smp8758-nand";

		reg = <0x2c000 0x30 0x2d000 0x800 0x20000 0x1000>;

		reg = <0x2c000 0x30>, <0x2d000 0x800>, <0x20000 0x1000>;

		dmas = <&dma0 3>;

		dmas = <&dma0 3>;

		dma-names = "nfc_sbox";

		dma-names = "rxtx";

		clocks = <&clkgen SYS_CLK>;

		clocks = <&clkgen SYS_CLK>;

		#address-cells = <1>;

		#address-cells = <1>;

		#size-cells = <0>;

		#size-cells = <0>;

Documentation/devicetree/bindings/net/mediatek-net.txt

+1 −1
Original line number Original line Diff line number Diff line
@@ -7,7 +7,7 @@ have dual GMAC each represented by a child node.. 
* Ethernet controller node

* Ethernet controller node





Required properties:

Required properties:

- compatible: Should be "mediatek,mt7623-eth"

- compatible: Should be "mediatek,mt2701-eth"

- reg: Address and length of the register set for the device

- reg: Address and length of the register set for the device

- interrupts: Should contain the three frame engines interrupts in numeric

- interrupts: Should contain the three frame engines interrupts in numeric

	order. These are fe_int0, fe_int1 and fe_int2.

	order. These are fe_int0, fe_int1 and fe_int2.

Documentation/devicetree/bindings/net/phy.txt

+3 −2
Original line number Original line Diff line number Diff line
@@ -19,8 +19,9 @@ Optional Properties: 
  specifications. If neither of these are specified, the default is to

  specifications. If neither of these are specified, the default is to

  assume clause 22.

  assume clause 22.





  If the phy's identifier is known then the list may contain an entry

  If the PHY reports an incorrect ID (or none at all) then the

  of the form: "ethernet-phy-idAAAA.BBBB" where

  "compatible" list may contain an entry with the correct PHY ID in the

  form: "ethernet-phy-idAAAA.BBBB" where

     AAAA - The value of the 16 bit Phy Identifier 1 register as

     AAAA - The value of the 16 bit Phy Identifier 1 register as

            4 hex digits. This is the chip vendor OUI bits 3:18

            4 hex digits. This is the chip vendor OUI bits 3:18

     BBBB - The value of the 16 bit Phy Identifier 2 register as

     BBBB - The value of the 16 bit Phy Identifier 2 register as

Documentation/devicetree/bindings/net/ti,dp83867.txt

+4 −2
Original line number Original line Diff line number Diff line
@@ -3,9 +3,11 @@ 
Required properties:

Required properties:

	- reg - The ID number for the phy, usually a small integer

	- reg - The ID number for the phy, usually a small integer

	- ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h

	- ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h

		for applicable values

		for applicable values. Required only if interface type is

		PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_RXID

	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h

	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h

		for applicable values

		for applicable values. Required only if interface type is

		PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID

	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h

	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h

		for applicable values

		for applicable values