Commit 12a269e7 authored Jan 30, 2020 by Sagar Chormale Committed by Gerrit - the friendly Code Review server Feb 02, 2020

ARM: dts: qcom: Add Performance Monitor Unit Node Support For mdm9607



ARM cores often have a PMU for counting cpu and cache events like cache
misses and hits. The interface to the PMU is part of the ARM.

Change-Id: Ic7fd4a1a12dc453ef3bfee4107a06a23519452b2
Signed-off-by: Sagar Chormale <schormal@codeaurora.org>

parent 92fc776b

arch/arm64/boot/dts/qcom/mdm9607.dtsi

+6 −0

Original line number	Diff line number	Diff line
		@@ -376,6 +376,12 @@
		< 1305600 >;
		};

		cpu-pmu {
		compatible = "arm,cortex-a7-pmu";
		qcom,irq-is-percpu;
		interrupts = <1 8 0x100>;
		};

		qcom,sps {
		compatible = "qcom,msm-sps-4k";
		qcom,pipe-attr-ee;