Merge "disp: msm: dsi: refine the logic for mode filling and calculation" (129e6ce6) · Commits · e / devices / android_kernel_xiaomi_sm6125

drivers/gpu/drm/msm/dsi-staging/dsi_display.c

+38 −74

Original line number	Original line	Diff line number	Diff line
	@@ -6090,47 +6090,9 @@ int dsi_display_get_info(struct drm_connector *connector,
	return rc;		return rc;
	}		}

	static int dsi_display_get_mode_count_no_lock(struct dsi_display *display,
	u32 *count)
	{
	struct dsi_dfps_capabilities dfps_caps;
	struct dsi_dyn_clk_caps *dyn_clk_caps;
	int num_dfps_rates, num_bit_clks, rc = 0;

	if (!display \|\| !display->panel) {
	pr_err("invalid display:%d panel:%d\n", display != NULL,
	display ? display->panel != NULL : 0);
	return -EINVAL;
	}

	*count = display->panel->num_timing_nodes;

	rc = dsi_panel_get_dfps_caps(display->panel, &dfps_caps);
	if (rc) {
	pr_err("[%s] failed to get dfps caps from panel\n",
	display->name);
	return rc;
	}

	num_dfps_rates = !dfps_caps.dfps_support ? 1 : dfps_caps.dfps_list_len;

	dyn_clk_caps = &(display->panel->dyn_clk_caps);

	num_bit_clks = !dyn_clk_caps->dyn_clk_support ? 1 :
	dyn_clk_caps->bit_clk_list_len;

	/* Inflate num_of_modes by fps and bit clks in dfps */
	count = display->panel->num_timing_nodes
	num_dfps_rates * num_bit_clks;

	return 0;
	}

	int dsi_display_get_mode_count(struct dsi_display *display,		int dsi_display_get_mode_count(struct dsi_display *display,
	u32 *count)		u32 *count)
	{		{
	int rc;

	if (!display \|\| !display->panel) {		if (!display \|\| !display->panel) {
	pr_err("invalid display:%d panel:%d\n", display != NULL,		pr_err("invalid display:%d panel:%d\n", display != NULL,
	display ? display->panel != NULL : 0);		display ? display->panel != NULL : 0);
	@@ -6138,7 +6100,7 @@ int dsi_display_get_mode_count(struct dsi_display *display,
	}		}

	mutex_lock(&display->display_lock);		mutex_lock(&display->display_lock);
	rc = dsi_display_get_mode_count_no_lock(display, count);		*count = display->panel->num_display_modes;
	mutex_unlock(&display->display_lock);		mutex_unlock(&display->display_lock);

	return 0;		return 0;
	@@ -6218,7 +6180,7 @@ static void _dsi_display_populate_bit_clks(struct dsi_display *display,
	if (cfg->data_lanes & DSI_DATA_LANE_3)		if (cfg->data_lanes & DSI_DATA_LANE_3)
	lanes++;		lanes++;

	dsi_display_get_mode_count_no_lock(display, &total_modes);		total_modes = display->panel->num_display_modes;

	for (i = start; i < end; i++) {		for (i = start; i < end; i++) {
	src = &display->modes[i];		src = &display->modes[i];
	@@ -6272,8 +6234,8 @@ int dsi_display_get_modes(struct dsi_display *display,
	{		{
	struct dsi_dfps_capabilities dfps_caps;		struct dsi_dfps_capabilities dfps_caps;
	struct dsi_host_common_cfg *host = &display->panel->host_config;		struct dsi_host_common_cfg *host = &display->panel->host_config;
	bool is_split_link;		bool is_split_link, is_cmd_mode;
	u32 num_dfps_rates, panel_mode_count, total_mode_count;		u32 num_dfps_rates, timing_mode_count, display_mode_count;
	u32 sublinks_count, mode_idx, array_idx = 0;		u32 sublinks_count, mode_idx, array_idx = 0;
	struct dsi_dyn_clk_caps *dyn_clk_caps;		struct dsi_dyn_clk_caps *dyn_clk_caps;
	int i, start, end, rc = -EINVAL;		int i, start, end, rc = -EINVAL;
	@@ -6290,11 +6252,9 @@ int dsi_display_get_modes(struct dsi_display *display,
	if (display->modes)		if (display->modes)
	goto exit;		goto exit;

	rc = dsi_display_get_mode_count_no_lock(display, &total_mode_count);		display_mode_count = display->panel->num_display_modes;
	if (rc)
	goto error;

	display->modes = kcalloc(total_mode_count, sizeof(*display->modes),		display->modes = kcalloc(display_mode_count, sizeof(*display->modes),
	GFP_KERNEL);		GFP_KERNEL);
	if (!display->modes) {		if (!display->modes) {
	rc = -ENOMEM;		rc = -ENOMEM;
	@@ -6312,46 +6272,52 @@ int dsi_display_get_modes(struct dsi_display *display,

	num_dfps_rates = !dfps_caps.dfps_support ? 1 : dfps_caps.dfps_list_len;		num_dfps_rates = !dfps_caps.dfps_support ? 1 : dfps_caps.dfps_list_len;

	panel_mode_count = display->panel->num_timing_nodes;		timing_mode_count = display->panel->num_timing_nodes;

	for (mode_idx = 0; mode_idx < panel_mode_count; mode_idx++) {		for (mode_idx = 0; mode_idx < timing_mode_count; mode_idx++) {
	struct dsi_display_mode panel_mode;		struct dsi_display_mode display_mode;
	int topology_override = NO_OVERRIDE;		int topology_override = NO_OVERRIDE;

	if (display->cmdline_timing == mode_idx)		if (display->cmdline_timing == mode_idx)
	topology_override = display->cmdline_topology;		topology_override = display->cmdline_topology;

	memset(&panel_mode, 0, sizeof(panel_mode));		memset(&display_mode, 0, sizeof(display_mode));

	rc = dsi_panel_get_mode(display->panel, mode_idx,		rc = dsi_panel_get_mode(display->panel, mode_idx,
	&panel_mode, topology_override);		&display_mode,
			topology_override);
	if (rc) {		if (rc) {
	pr_err("[%s] failed to get mode idx %d from panel\n",		pr_err("[%s] failed to get mode idx %d from panel\n",
	display->name, mode_idx);		display->name, mode_idx);
	goto error;		goto error;
	}		}

			is_cmd_mode = (display_mode.panel_mode == DSI_OP_CMD_MODE);

	is_split_link = host->split_link.split_link_enabled;		is_split_link = host->split_link.split_link_enabled;
	sublinks_count = host->split_link.num_sublinks;		sublinks_count = host->split_link.num_sublinks;
	if (is_split_link && sublinks_count > 1) {		if (is_split_link && sublinks_count > 1) {
	panel_mode.timing.h_active *= sublinks_count;		display_mode.timing.h_active *= sublinks_count;
	panel_mode.timing.h_front_porch *= sublinks_count;		display_mode.timing.h_front_porch *= sublinks_count;
	panel_mode.timing.h_sync_width *= sublinks_count;		display_mode.timing.h_sync_width *= sublinks_count;
	panel_mode.timing.h_back_porch *= sublinks_count;		display_mode.timing.h_back_porch *= sublinks_count;
	panel_mode.timing.h_skew *= sublinks_count;		display_mode.timing.h_skew *= sublinks_count;
	panel_mode.pixel_clk_khz *= sublinks_count;		display_mode.pixel_clk_khz *= sublinks_count;
	} else {		} else {
	panel_mode.timing.h_active *= display->ctrl_count;		display_mode.timing.h_active *= display->ctrl_count;
	panel_mode.timing.h_front_porch *= display->ctrl_count;		display_mode.timing.h_front_porch *=
	panel_mode.timing.h_sync_width *= display->ctrl_count;		display->ctrl_count;
	panel_mode.timing.h_back_porch *= display->ctrl_count;		display_mode.timing.h_sync_width *=
	panel_mode.timing.h_skew *= display->ctrl_count;		display->ctrl_count;
	panel_mode.pixel_clk_khz *= display->ctrl_count;		display_mode.timing.h_back_porch *=
			display->ctrl_count;
			display_mode.timing.h_skew *= display->ctrl_count;
			display_mode.pixel_clk_khz *= display->ctrl_count;
	}		}

	/* pixel overlap is not supported for single dsi panels */		/* pixel overlap is not supported for single dsi panels */
	if (display->ctrl_count == 1)		if (display->ctrl_count == 1)
	panel_mode.priv_info->overlap_pixels = 0;		display_mode.priv_info->overlap_pixels = 0;

	start = array_idx;		start = array_idx;

	@@ -6366,10 +6332,10 @@ int dsi_display_get_modes(struct dsi_display *display,
	goto error;		goto error;
	}		}

	memcpy(sub_mode, &panel_mode, sizeof(panel_mode));		memcpy(sub_mode, &display_mode, sizeof(display_mode));
	array_idx++;		array_idx++;

	if (!dfps_caps.dfps_support)		if (!dfps_caps.dfps_support \|\| is_cmd_mode)
	continue;		continue;

	curr_refresh_rate = sub_mode->timing.refresh_rate;		curr_refresh_rate = sub_mode->timing.refresh_rate;
	@@ -6410,12 +6376,9 @@ int dsi_display_get_panel_vfp(void *dsi_display,
	if (!display)		if (!display)
	return -EINVAL;		return -EINVAL;

	rc = dsi_display_get_mode_count(display, &count);
	if (rc)
	return rc;

	mutex_lock(&display->display_lock);		mutex_lock(&display->display_lock);

			count = display->panel->num_display_modes;
	if (display->panel && display->panel->cur_mode)		if (display->panel && display->panel->cur_mode)
	refresh_rate = display->panel->cur_mode->timing.refresh_rate;		refresh_rate = display->panel->cur_mode->timing.refresh_rate;

	@@ -6462,9 +6425,9 @@ int dsi_display_find_mode(struct dsi_display *display,

	*out_mode = NULL;		*out_mode = NULL;

	rc = dsi_display_get_mode_count(display, &count);		mutex_lock(&display->display_lock);
	if (rc)		count = display->panel->num_display_modes;
	return rc;		mutex_unlock(&display->display_lock);

	if (!display->modes) {		if (!display->modes) {
	struct dsi_display_mode *m;		struct dsi_display_mode *m;
	@@ -6548,7 +6511,8 @@ int dsi_display_validate_mode_change(struct dsi_display *display,
	mutex_lock(&display->display_lock);		mutex_lock(&display->display_lock);
	dyn_clk_caps = &(display->panel->dyn_clk_caps);		dyn_clk_caps = &(display->panel->dyn_clk_caps);
	if ((cur_mode->timing.v_active == adj_mode->timing.v_active) &&		if ((cur_mode->timing.v_active == adj_mode->timing.v_active) &&
	(cur_mode->timing.h_active == adj_mode->timing.h_active)) {		(cur_mode->timing.h_active == adj_mode->timing.h_active) &&
			(cur_mode->panel_mode == adj_mode->panel_mode)) {
	/* dfps and dynamic clock with const fps use case */		/* dfps and dynamic clock with const fps use case */
	if (dsi_display_mode_switch_dfps(cur_mode, adj_mode)) {		if (dsi_display_mode_switch_dfps(cur_mode, adj_mode)) {
	dsi_panel_get_dfps_caps(display->panel, &dfps_caps);		dsi_panel_get_dfps_caps(display->panel, &dfps_caps);

drivers/gpu/drm/msm/dsi-staging/dsi_display.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -374,7 +374,7 @@ int dsi_display_get_mode_count(struct dsi_display display, u32 count);
	* dsi_display_get_modes() - get modes supported by display		* dsi_display_get_modes() - get modes supported by display
	* @display: Handle to display.		* @display: Handle to display.
	* @modes; Output param, list of DSI modes. Number of modes matches		* @modes; Output param, list of DSI modes. Number of modes matches
	* count returned by dsi_display_get_mode_count		* count got from display->panel->num_display_modes;
	*		*
	* Return: error code.		* Return: error code.
	*/		*/

drivers/gpu/drm/msm/dsi-staging/dsi_panel.c

+26 −1

Original line number	Original line	Diff line number	Diff line
	@@ -3496,8 +3496,11 @@ int dsi_panel_get_mode_count(struct dsi_panel *panel)
	{		{
	const u32 SINGLE_MODE_SUPPORT = 1;		const u32 SINGLE_MODE_SUPPORT = 1;
	struct dsi_parser_utils *utils;		struct dsi_parser_utils *utils;
	struct device_node *timings_np;		struct device_node timings_np, child_np;
			int num_dfps_rates, num_bit_clks;
			int num_video_modes = 0, num_cmd_modes = 0;
	int count, rc = 0;		int count, rc = 0;
			void *utils_data = NULL;

	if (!panel) {		if (!panel) {
	pr_err("invalid params\n");		pr_err("invalid params\n");
	@@ -3533,6 +3536,28 @@ int dsi_panel_get_mode_count(struct dsi_panel *panel)
	count = SINGLE_MODE_SUPPORT;		count = SINGLE_MODE_SUPPORT;

	panel->num_timing_nodes = count;		panel->num_timing_nodes = count;
			dsi_for_each_child_node(timings_np, child_np) {
			utils_data = child_np;
			if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
			num_video_modes++;
			else if (utils->read_bool(utils->data,
			"qcom,mdss-dsi-cmd-mode"))
			num_cmd_modes++;
			else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
			num_video_modes++;
			else if (panel->panel_mode == DSI_OP_CMD_MODE)
			num_cmd_modes++;
			}

			num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
			panel->dfps_caps.dfps_list_len;

			num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
			panel->dyn_clk_caps.bit_clk_list_len;

			/* Inflate num_of_modes by fps and bit clks in dfps */
			panel->num_display_modes = (num_cmd_modes * num_bit_clks) +
			(num_video_modes * num_bit_clks * num_dfps_rates);

	error:		error:
	return rc;		return rc;

drivers/gpu/drm/msm/dsi-staging/dsi_panel.h

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -190,6 +190,7 @@ struct dsi_panel {

	struct dsi_display_mode *cur_mode;		struct dsi_display_mode *cur_mode;
	u32 num_timing_nodes;		u32 num_timing_nodes;
			u32 num_display_modes;

	struct dsi_regulator_info power_info;		struct dsi_regulator_info power_info;
	struct dsi_backlight_config bl_config;		struct dsi_backlight_config bl_config;