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Commit 0a738d23 authored by Jeyaprakash Soundrapandian's avatar Jeyaprakash Soundrapandian Committed by Gerrit - the friendly Code Review server
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Merge "DOWNSTREAM Merge commit '69d3f157'... 

Merge "DOWNSTREAM Merge commit '69d3f157' AU300 08_15" into dev/msm-4.14-camx
parents c588598d 4512f88a

AndroidKernel.mk

+2 −0
Original line number Diff line number Diff line
@@ -120,6 +120,8 @@ KERNEL_MODULES_OUT ?= $(PRODUCT_OUT)/$(KERNEL_MODULES_INSTALL)/lib/modules 


TARGET_PREBUILT_KERNEL := $(TARGET_PREBUILT_INT_KERNEL)



BOARD_VENDOR_KERNEL_MODULES += $(shell ls $(KERNEL_MODULES_OUT)/*.ko)



define mv-modules

mdpath=`find $(KERNEL_MODULES_OUT) -type f -name modules.dep`;\

if [ "$$mdpath" != "" ];then\

Documentation/devicetree/bindings/arm/msm/qcom,osm.txt

+2 −1
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@@ -9,7 +9,8 @@ Properties: 
- compatible

	Usage:      required

	Value type: <string>

	Definition: must be "qcom,clk-cpu-osm" or "qcom,clk-cpu-osm-sdmshrike".

	Definition: must be "qcom,clk-cpu-osm" or "qcom,clk-cpu-osm-sdmshrike"

				or "qcom,clk-cpu-osm-sm6150".



- reg

	Usage:      required

Documentation/devicetree/bindings/clock/qcom,camcc.txt

+1 −1
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding 


Required properties :

- compatible : must contain "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2"

	       or "qcom,camcc-sdmshrike".

	       or "qcom,camcc-sdmshrike" or "qcom,camcc-sm6150".

- reg : shall contain base register location and length.

- reg-names: names of registers listed in the same order as in

	     the reg property.

Documentation/devicetree/bindings/clock/qcom,debugcc.txt

+2 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ Required properties : 
- qcom,dispcc: phandle to the Display CC device node.

- qcom,npucc: phandle to the NPU CC device node.

- qcom,cpucc: phandle to the CPU CC debug device node.

- qcom,mccc: phandle to the MC CC debug device node.

- clock-names: Shall contain "xo_clk_src"

- clocks: phandle + clock reference to the CXO clock.

- #clock-cells : Shall contain 1.
@@ -24,6 +25,7 @@ Example: 
		qcom,dispcc = <&clock_dispcc>;

		qcom,npucc = <&clock_npucc>;

		qcom,cpucc = <&cpucc_debug>;

		qcom,mccc = <&mccc_debug>;

		clock-names = "xo_clk_src";

		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		#clock-cells = <1>;

Documentation/devicetree/bindings/clock/qcom,dispcc.txt

+2 −1
Original line number Diff line number Diff line
@@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Display Clock & Reset Controller Binding 
--------------------------------------------------------------------



Required properties :

- compatible : Shall contain "qcom,dispcc-sm8150" or "qcom,dispcc-sm8150-v2".

- compatible : Shall contain "qcom,dispcc-sm8150" or "qcom,dispcc-sm8150-v2" or

				"qcom,dispcc-sm6150".

- reg : Shall contain base register location and length.

- reg-names: Address name. Must be "cc_base".

- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf