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Commit 07cd0e51 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "Merge remote-tracking branch 'quic/dev/msm-4.14-display' into msm-4.14"

parents 64d9f429 aa0e67bb

Documentation/devicetree/bindings/drm/msm/mdss-dsi-panel.txt

+2 −9
Original line number Diff line number Diff line
@@ -179,12 +179,7 @@ Optional properties: 
                                          "bl_ctrl_dcs" = Backlight controlled by DCS commands.

                                          "bl_ctrl_external" = Backlight controlled by externally

                                          other: Unknown backlight control. (default)

- qcom,mdss-dsi-bl-pwm-pmi:		Boolean to indicate that PWM control is through second pmic chip.

- qcom,mdss-dsi-bl-pmic-bank-select:	LPG channel for backlight.

					Required if backlight pmic control type is PWM

- qcom,mdss-dsi-bl-pmic-pwm-frequency:	PWM period in microseconds.

					Required if backlight pmic control type is PWM

- qcom,mdss-dsi-pwm-gpio:		PMIC gpio binding to backlight.

- qcom,bl-pmic-pwm-period-usecs:	PWM period in microseconds.

					Required if backlight pmic control type is PWM

- qcom,mdss-dsi-bl-min-level:		Specifies the min backlight level supported by the panel.

					0 = default value.
@@ -671,9 +666,7 @@ Example: 
		qcom,mdss-dsi-pan-enable-dynamic-fps;

		qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode";

		qcom,dsi-supported-dfps-list = <48 55 60>;

		qcom,mdss-dsi-bl-pmic-bank-select = <0>;

		qcom,mdss-dsi-bl-pmic-pwm-frequency = <0>;

		qcom,mdss-dsi-pwm-gpio = <&pm8941_mpps 5 0>;

		qcom,bl-pmic-pwm-period-usecs = <0>;

		qcom,5v-boost-gpio = <&pm8994_gpios 14 0>;

		qcom,mdss-pan-physical-width-dimension = <60>;

		qcom,mdss-pan-physical-height-dimension = <140>;

drivers/gpu/drm/drm_dp_mst_topology.c

+1 −0
Original line number Diff line number Diff line
@@ -439,6 +439,7 @@ static bool drm_dp_sideband_parse_remote_dpcd_read(struct drm_dp_sideband_msg_rx 
	if (idx > raw->curlen)

		goto fail_len;

	repmsg->u.remote_dpcd_read_ack.num_bytes = raw->msg[idx];

	idx++;

	if (idx > raw->curlen)

		goto fail_len;

drivers/gpu/drm/msm/dp/dp_debug.c

+21 −2
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ struct dp_debug_private { 
	struct dp_debug dp_debug;

	struct dp_parser *parser;

	struct dp_ctrl *ctrl;

	struct mutex lock;

};



static int dp_debug_get_edid_buf(struct dp_debug_private *debug)
@@ -99,6 +100,8 @@ static ssize_t dp_debug_write_edid(struct file *file, 
	if (!debug)

		return -ENODEV;



	mutex_lock(&debug->lock);



	if (*ppos)

		goto bail;
@@ -170,6 +173,7 @@ static ssize_t dp_debug_write_edid(struct file *file, 
	 */

	pr_info("[%s]\n", edid ? "SET" : "CLEAR");



	mutex_unlock(&debug->lock);

	return rc;

}
@@ -189,6 +193,8 @@ static ssize_t dp_debug_write_dpcd(struct file *file, 
	if (!debug)

		return -ENODEV;



	mutex_lock(&debug->lock);



	if (*ppos)

		goto bail;
@@ -270,6 +276,7 @@ static ssize_t dp_debug_write_dpcd(struct file *file, 
		debug->aux->dpcd_updated(debug->aux);

	}



	mutex_unlock(&debug->lock);

	return rc;

}
@@ -757,7 +764,7 @@ static ssize_t dp_debug_write_exe_mode(struct file *file, 
		const char __user *user_buff, size_t count, loff_t *ppos)

{

	struct dp_debug_private *debug = file->private_data;

	char *buf;

	char buf[SZ_32];

	size_t len = 0;



	if (!debug)
@@ -767,7 +774,9 @@ static ssize_t dp_debug_write_exe_mode(struct file *file, 
		return 0;



	len = min_t(size_t, count, SZ_32 - 1);

	buf = memdup_user(user_buff, len);

	if (copy_from_user(buf, user_buff, len))

		goto end;



	buf[len] = '\0';



	if (sscanf(buf, "%3s", debug->exe_mode) != 1)
@@ -1447,6 +1456,7 @@ static void dp_debug_set_sim_mode(struct dp_debug_private *debug, bool sim) 


		if (dp_debug_get_dpcd_buf(debug)) {

			devm_kfree(debug->dev, debug->edid);

			debug->edid = NULL;

			return;

		}
@@ -1495,6 +1505,8 @@ static ssize_t dp_debug_write_sim(struct file *file, 
	if (*ppos)

		return 0;



	mutex_lock(&debug->lock);



	/* Leave room for termination char */

	len = min_t(size_t, count, SZ_8 - 1);

	if (copy_from_user(buf, user_buff, len))
@@ -1507,6 +1519,7 @@ static ssize_t dp_debug_write_sim(struct file *file, 


	dp_debug_set_sim_mode(debug, sim);

end:

	mutex_unlock(&debug->lock);

	return len;

}
@@ -1993,7 +2006,9 @@ static void dp_debug_abort(struct dp_debug *dp_debug) 


	debug = container_of(dp_debug, struct dp_debug_private, dp_debug);



	mutex_lock(&debug->lock);

	dp_debug_set_sim_mode(debug, false);

	mutex_unlock(&debug->lock);

}



struct dp_debug *dp_debug_get(struct dp_debug_in *in)
@@ -2031,6 +2046,8 @@ struct dp_debug *dp_debug_get(struct dp_debug_in *in) 
	dp_debug->hdisplay = 0;

	dp_debug->vrefresh = 0;



	mutex_init(&debug->lock);



	rc = dp_debug_init(dp_debug);

	if (rc) {

		devm_kfree(in->dev, debug);
@@ -2082,6 +2099,8 @@ void dp_debug_put(struct dp_debug *dp_debug) 


	dp_debug_deinit(dp_debug);



	mutex_destroy(&debug->lock);



	if (debug->edid)

		devm_kfree(debug->dev, debug->edid);

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c

+8 −0
Original line number Diff line number Diff line
@@ -201,6 +201,14 @@ static void dsi_catalog_phy_2_0_init(struct dsi_phy_hw *phy) 
		dsi_phy_hw_calculate_timing_params;

	phy->ops.phy_timing_val = dsi_phy_hw_timing_val_v2_0;

	phy->ops.clamp_ctrl = dsi_phy_hw_v2_0_clamp_ctrl;

	phy->ops.dyn_refresh_ops.dyn_refresh_config =

		dsi_phy_hw_v2_0_dyn_refresh_config;

	phy->ops.dyn_refresh_ops.dyn_refresh_pipe_delay =

		dsi_phy_hw_v2_0_dyn_refresh_pipe_delay;

	phy->ops.dyn_refresh_ops.dyn_refresh_helper =

		dsi_phy_hw_v2_0_dyn_refresh_helper;

	phy->ops.dyn_refresh_ops.cache_phy_timings =

		dsi_phy_hw_v2_0_cache_phy_timings;

}



/**

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h

+7 −0
Original line number Diff line number Diff line
@@ -89,6 +89,13 @@ void dsi_phy_hw_v2_0_idle_off(struct dsi_phy_hw *phy); 
int dsi_phy_hw_timing_val_v2_0(struct dsi_phy_per_lane_cfgs *timing_cfg,

		u32 *timing_val, u32 size);

void dsi_phy_hw_v2_0_clamp_ctrl(struct dsi_phy_hw *phy, bool enable);

void dsi_phy_hw_v2_0_dyn_refresh_helper(struct dsi_phy_hw *phy, u32 offset);

void dsi_phy_hw_v2_0_dyn_refresh_config(struct dsi_phy_hw *phy,

		struct dsi_phy_cfg *cfg, bool is_master);

void dsi_phy_hw_v2_0_dyn_refresh_pipe_delay(struct dsi_phy_hw *phy,

		struct dsi_dyn_clk_delay *delay);

int dsi_phy_hw_v2_0_cache_phy_timings(struct dsi_phy_per_lane_cfgs *timings,

		u32 *dst, u32 size);



/* Definitions for 10nm PHY hardware driver */

void dsi_phy_hw_v3_0_regulator_enable(struct dsi_phy_hw *phy,