Commit 07c1e8c1 authored Jan 07, 2012 by Eugeni Dodonov Committed by Keith Packard Jan 09, 2012

drm/i915: handle 3rd pipe



We don't need to check 3rd pipe specifically, as it shares PLL with some
other one.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>

parent 5e5b7fa2

drivers/gpu/drm/i915/i915_suspend.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -35,6 +35,10 @@ static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
		struct drm_i915_private *dev_priv = dev->dev_private;
		u32 dpll_reg;

		/* On IVB, 3rd pipe shares PLL with another one */
		if (pipe > 1)
		return false;

		if (HAS_PCH_SPLIT(dev))
		dpll_reg = PCH_DPLL(pipe);
		else