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Commit 0277e01a authored by Alexander Kochetkov's avatar Alexander Kochetkov Committed by Mark Brown
Browse files

spi/rockchip: fix endian mode for 16-bit transfers 



16-bit transfers must be in big endian mode on wire.

Signed-off-by: default avatarAlexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b920cc31

drivers/spi/spi-rockchip.c

+2 −1
Original line number Diff line number Diff line
@@ -506,7 +506,8 @@ static void rockchip_spi_config(struct rockchip_spi *rs) 
	int rsd = 0;



	u32 cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET)

		| (CR0_SSD_ONE << CR0_SSD_OFFSET);

		| (CR0_SSD_ONE << CR0_SSD_OFFSET)

		| (CR0_EM_BIG << CR0_EM_OFFSET);



	cr0 |= (rs->n_bytes << CR0_DFS_OFFSET);

	cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET);