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Commit 012a7069 authored by Valentine Barshak's avatar Valentine Barshak Committed by Simon Horman
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ARM: shmobile: r8a7790: Add PCI USB host clock support 



This adds internal PCI USB host clock support.

Signed-off-by: default avatarValentine Barshak <valentine.barshak@cogentembedded.com>
Acked-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 3440cb28

arch/arm/mach-shmobile/clock-r8a7790.c

+5 −1
Original line number Diff line number Diff line
@@ -201,7 +201,7 @@ enum { 
	MSTP811, MSTP810, MSTP809, MSTP808,

	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,

	MSTP717, MSTP716,

	MSTP704,

	MSTP704, MSTP703,

	MSTP522,

	MSTP502, MSTP501,

	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
@@ -244,6 +244,7 @@ static struct clk mstp_clks[MSTP_NR] = { 
	[MSTP717] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 17, MSTPSR7, 0), /* HSCIF0 */

	[MSTP716] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 16, MSTPSR7, 0), /* HSCIF1 */

	[MSTP704] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 4, MSTPSR7, 0), /* HSUSB */

	[MSTP703] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 3, MSTPSR7, 0), /* EHCI */

	[MSTP522] = SH_CLK_MSTP32_STS(&extal_clk, SMSTPCR5, 22, MSTPSR5, 0), /* Thermal */

	[MSTP502] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 2, MSTPSR5, 0), /* Audio-DMAC low */

	[MSTP501] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 1, MSTPSR5, 0), /* Audio-DMAC hi */
@@ -343,6 +344,9 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),

	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),

	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),

	CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),

	CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]),

	CLKDEV_DEV_ID("pci-rcar-gen2.2", &mstp_clks[MSTP703]),

	CLKDEV_DEV_ID("sata-r8a7790.0", &mstp_clks[MSTP815]),

	CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),