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Commit ff6c0479 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Disable ATOS feature for smmu for sm8150"

parents f30d026b a11afa1c

Documentation/devicetree/bindings/iommu/arm,smmu.txt

+4 −0
Original line number Diff line number Diff line
@@ -113,6 +113,10 @@ conditions. 
		  supported as we are directly comparing client SID with ID bits

		  of SMR registers.



-qcom,disable-atos:

		  Some hardware may not have full support for atos debugging

		  in tandem with other features like power collapse.



- qcom,deferred-regulator-disable-delay : The time delay for deferred regulator

                  disable in ms. In case of unmap call, regulator is

                  enabled/disabled. This may introduce additional delay. For

arch/arm64/boot/dts/qcom/msm-arm-smmu-sm8150.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
		qcom,skip-init;

		qcom,use-3-lvl-tables;

		qcom,no-asid-retention;

		qcom,disable-atos;

		#global-interrupts = <1>;

		qcom,regulator-names = "vdd";

		vdd-supply = <&gpu_cx_gdsc>;
@@ -72,6 +73,7 @@ 
		qcom,skip-init;

		qcom,use-3-lvl-tables;

		qcom,no-asid-retention;

		qcom,disable-atos;

		#global-interrupts = <1>;

		#size-cells = <1>;

		#address-cells = <1>;

drivers/iommu/arm-smmu.c

+6 −0
Original line number Diff line number Diff line
@@ -252,6 +252,7 @@ struct arm_smmu_device { 
#define ARM_SMMU_OPT_3LVL_TABLES	(1 << 4)

#define ARM_SMMU_OPT_NO_ASID_RETENTION	(1 << 5)

#define ARM_SMMU_OPT_STATIC_CB		(1 << 6)

#define ARM_SMMU_OPT_DISABLE_ATOS	(1 << 7)

	u32				options;

	enum arm_smmu_arch_version	version;

	enum arm_smmu_implementation	model;
@@ -388,6 +389,7 @@ static struct arm_smmu_option_prop arm_smmu_options[] = { 
	{ ARM_SMMU_OPT_3LVL_TABLES, "qcom,use-3-lvl-tables" },

	{ ARM_SMMU_OPT_NO_ASID_RETENTION, "qcom,no-asid-retention" },

	{ ARM_SMMU_OPT_STATIC_CB, "qcom,enable-static-cb"},

	{ ARM_SMMU_OPT_DISABLE_ATOS, "qcom,disable-atos" },

	{ 0, NULL},

};
@@ -2720,6 +2722,10 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain, 
	phys_addr_t ret = 0;

	unsigned long flags;

	struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);

	struct arm_smmu_device *smmu = smmu_domain->smmu;



	if (smmu->options & ARM_SMMU_OPT_DISABLE_ATOS)

		return 0;



	if (arm_smmu_power_on(smmu_domain->smmu->pwr))

		return 0;