Merge "asoc: codecs: bolero: Fix L/R swap issue on bolero RX" (fe60fa21) · Commits · e / devices / android_kernel_xiaomi_nabu

asoc/codecs/bolero/rx-macro.c

+94 −12

Original line number	Original line	Diff line number	Diff line
	@@ -285,6 +285,7 @@ static int rx_macro_hw_params(struct snd_pcm_substream *substream,
	static int rx_macro_get_channel_map(struct snd_soc_dai *dai,		static int rx_macro_get_channel_map(struct snd_soc_dai *dai,
	unsigned int tx_num, unsigned int tx_slot,		unsigned int tx_num, unsigned int tx_slot,
	unsigned int rx_num, unsigned int rx_slot);		unsigned int rx_num, unsigned int rx_slot);
			static int rx_macro_digital_mute(struct snd_soc_dai *dai, int mute);
	static int rx_macro_int_dem_inp_mux_put(struct snd_kcontrol *kcontrol,		static int rx_macro_int_dem_inp_mux_put(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);		struct snd_ctl_elem_value *ucontrol);
	static int rx_macro_mux_get(struct snd_kcontrol *kcontrol,		static int rx_macro_mux_get(struct snd_kcontrol *kcontrol,
	@@ -579,6 +580,7 @@ static const struct snd_kcontrol_new rx_mix_tx0_mux =
	static struct snd_soc_dai_ops rx_macro_dai_ops = {		static struct snd_soc_dai_ops rx_macro_dai_ops = {
	.hw_params = rx_macro_hw_params,		.hw_params = rx_macro_hw_params,
	.get_channel_map = rx_macro_get_channel_map,		.get_channel_map = rx_macro_get_channel_map,
			.digital_mute = rx_macro_digital_mute,
	};		};

	static struct snd_soc_dai_driver rx_macro_dai[] = {		static struct snd_soc_dai_driver rx_macro_dai[] = {
	@@ -826,9 +828,9 @@ static int rx_macro_set_prim_interpolator_rate(struct snd_soc_dai *dai,

	int_mux_cfg0_val = snd_soc_read(codec, int_mux_cfg0);		int_mux_cfg0_val = snd_soc_read(codec, int_mux_cfg0);
	int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1);		int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1);
	inp0_sel = int_mux_cfg0_val & 0x07;		inp0_sel = int_mux_cfg0_val & 0x0F;
	inp1_sel = (int_mux_cfg0_val >> 4) & 0x038;		inp1_sel = (int_mux_cfg0_val >> 4) & 0x0F;
	inp2_sel = (int_mux_cfg1_val >> 4) & 0x038;		inp2_sel = (int_mux_cfg1_val >> 4) & 0x0F;
	if ((inp0_sel == int_1_mix1_inp) \|\|		if ((inp0_sel == int_1_mix1_inp) \|\|
	(inp1_sel == int_1_mix1_inp) \|\|		(inp1_sel == int_1_mix1_inp) \|\|
	(inp2_sel == int_1_mix1_inp)) {		(inp2_sel == int_1_mix1_inp)) {
	@@ -877,7 +879,7 @@ static int rx_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai,
	int_mux_cfg1 = BOLERO_CDC_RX_INP_MUX_RX_INT0_CFG1;		int_mux_cfg1 = BOLERO_CDC_RX_INP_MUX_RX_INT0_CFG1;
	for (j = 0; j < INTERP_MAX; j++) {		for (j = 0; j < INTERP_MAX; j++) {
	int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1) &		int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1) &
	0x07;		0x0F;
	if (int_mux_cfg1_val == int_2_inp) {		if (int_mux_cfg1_val == int_2_inp) {
	int_fs_reg = BOLERO_CDC_RX_RX0_RX_PATH_MIX_CTL +		int_fs_reg = BOLERO_CDC_RX_RX0_RX_PATH_MIX_CTL +
	0x80 * j;		0x80 * j;
	@@ -1035,6 +1037,53 @@ static int rx_macro_get_channel_map(struct snd_soc_dai *dai,
	return 0;		return 0;
	}		}

			static int rx_macro_digital_mute(struct snd_soc_dai *dai, int mute)
			{
			struct snd_soc_codec *codec = dai->codec;
			struct device *rx_dev = NULL;
			struct rx_macro_priv *rx_priv = NULL;
			uint16_t j = 0, reg = 0, mix_reg = 0, dsm_reg = 0;
			u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
			u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;

			if (mute)
			return 0;

			if (!rx_macro_get_data(codec, &rx_dev, &rx_priv, __func__))
			return -EINVAL;

			switch (dai->id) {
			case RX_MACRO_AIF1_PB:
			case RX_MACRO_AIF2_PB:
			case RX_MACRO_AIF3_PB:
			case RX_MACRO_AIF4_PB:
			for (j = 0; j < INTERP_MAX; j++) {
			reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL +
			(j * RX_MACRO_RX_PATH_OFFSET);
			mix_reg = BOLERO_CDC_RX_RX0_RX_PATH_MIX_CTL +
			(j * RX_MACRO_RX_PATH_OFFSET);
			dsm_reg = BOLERO_CDC_RX_RX0_RX_PATH_DSM_CTL +
			(j * RX_MACRO_RX_PATH_OFFSET);
			if (j == INTERP_AUX)
			dsm_reg = BOLERO_CDC_RX_RX2_RX_PATH_DSM_CTL;
			int_mux_cfg0 = BOLERO_CDC_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
			int_mux_cfg1 = int_mux_cfg0 + 4;
			int_mux_cfg0_val = snd_soc_read(codec, int_mux_cfg0);
			int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1);
			if (snd_soc_read(codec, dsm_reg) & 0x01) {
			if (int_mux_cfg0_val \|\| (int_mux_cfg1_val & 0xF0))
			snd_soc_update_bits(codec, reg, 0x20, 0x20);
			if (int_mux_cfg1_val & 0x0F)
			snd_soc_update_bits(codec, mix_reg, 0x20, 0x20);
			}
			}
			break;
			default:
			break;
			}
			return 0;
			}

	static int rx_macro_mclk_enable(struct rx_macro_priv *rx_priv,		static int rx_macro_mclk_enable(struct rx_macro_priv *rx_priv,
	bool mclk_enable, bool dapm)		bool mclk_enable, bool dapm)
	{		{
	@@ -1407,8 +1456,6 @@ static int rx_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
	rx_macro_set_idle_detect_thr(codec, rx_priv, w->shift,		rx_macro_set_idle_detect_thr(codec, rx_priv, w->shift,
	INTERP_MIX_PATH);		INTERP_MIX_PATH);
	rx_macro_enable_interp_clk(codec, event, w->shift);		rx_macro_enable_interp_clk(codec, event, w->shift);
	/* Clk enable */
	snd_soc_update_bits(codec, mix_reg, 0x20, 0x20);
	break;		break;
	case SND_SOC_DAPM_POST_PMU:		case SND_SOC_DAPM_POST_PMU:
	snd_soc_write(codec, gain_reg,		snd_soc_write(codec, gain_reg,
	@@ -1427,6 +1474,41 @@ static int rx_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
	return 0;		return 0;
	}		}

			static bool rx_macro_adie_lb(struct snd_soc_codec *codec, int interp_idx)
			{
			u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
			u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;
			u8 int_n_inp0 = 0, int_n_inp1 = 0, int_n_inp2 = 0;

			int_mux_cfg0 = BOLERO_CDC_RX_INP_MUX_RX_INT0_CFG0 + interp_idx * 8;
			int_mux_cfg1 = int_mux_cfg0 + 4;
			int_mux_cfg0_val = snd_soc_read(codec, int_mux_cfg0);
			int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1);

			int_n_inp0 = int_mux_cfg0_val & 0x0F;
			if (int_n_inp0 == INTn_1_INP_SEL_DEC0 \|\|
			int_n_inp0 == INTn_1_INP_SEL_DEC1 \|\|
			int_n_inp0 == INTn_1_INP_SEL_IIR0 \|\|
			int_n_inp0 == INTn_1_INP_SEL_IIR1)
			return true;

			int_n_inp1 = int_mux_cfg0_val >> 4;
			if (int_n_inp1 == INTn_1_INP_SEL_DEC0 \|\|
			int_n_inp1 == INTn_1_INP_SEL_DEC1 \|\|
			int_n_inp1 == INTn_1_INP_SEL_IIR0 \|\|
			int_n_inp1 == INTn_1_INP_SEL_IIR1)
			return true;

			int_n_inp2 = int_mux_cfg1_val >> 4;
			if (int_n_inp2 == INTn_1_INP_SEL_DEC0 \|\|
			int_n_inp2 == INTn_1_INP_SEL_DEC1 \|\|
			int_n_inp2 == INTn_1_INP_SEL_IIR0 \|\|
			int_n_inp2 == INTn_1_INP_SEL_IIR1)
			return true;

			return false;
			}

	static int rx_macro_enable_main_path(struct snd_soc_dapm_widget *w,		static int rx_macro_enable_main_path(struct snd_soc_dapm_widget *w,
	struct snd_kcontrol *kcontrol,		struct snd_kcontrol *kcontrol,
	int event)		int event)
	@@ -1458,6 +1540,8 @@ static int rx_macro_enable_main_path(struct snd_soc_dapm_widget *w,
	rx_macro_set_idle_detect_thr(codec, rx_priv, w->shift,		rx_macro_set_idle_detect_thr(codec, rx_priv, w->shift,
	INTERP_MAIN_PATH);		INTERP_MAIN_PATH);
	rx_macro_enable_interp_clk(codec, event, w->shift);		rx_macro_enable_interp_clk(codec, event, w->shift);
			if (rx_macro_adie_lb(codec, w->shift))
			snd_soc_update_bits(codec, reg, 0x20, 0x20);
	break;		break;
	case SND_SOC_DAPM_POST_PMU:		case SND_SOC_DAPM_POST_PMU:
	snd_soc_write(codec, gain_reg,		snd_soc_write(codec, gain_reg,
	@@ -2171,8 +2255,6 @@ static int rx_macro_enable_interp_clk(struct snd_soc_codec *codec,
	/* Main path PGA mute enable */		/* Main path PGA mute enable */
	snd_soc_update_bits(codec, main_reg, 0x10, 0x10);		snd_soc_update_bits(codec, main_reg, 0x10, 0x10);
	snd_soc_update_bits(codec, dsm_reg, 0x01, 0x01);		snd_soc_update_bits(codec, dsm_reg, 0x01, 0x01);
	/* Clk enable */
	snd_soc_update_bits(codec, main_reg, 0x20, 0x20);
	snd_soc_update_bits(codec, rx_cfg2_reg, 0x03, 0x03);		snd_soc_update_bits(codec, rx_cfg2_reg, 0x03, 0x03);
	rx_macro_idle_detect_control(codec, rx_priv,		rx_macro_idle_detect_control(codec, rx_priv,
	interp_idx, event);		interp_idx, event);
	@@ -2230,15 +2312,18 @@ static int rx_macro_enable_rx_path_clk(struct snd_soc_dapm_widget *w,
	struct snd_kcontrol *kcontrol, int event)		struct snd_kcontrol *kcontrol, int event)
	{		{
	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);		struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
	u16 sidetone_reg = 0;		u16 sidetone_reg = 0, fs_reg = 0;

	dev_dbg(codec->dev, "%s %d %d\n", __func__, event, w->shift);		dev_dbg(codec->dev, "%s %d %d\n", __func__, event, w->shift);
	sidetone_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG1 +		sidetone_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG1 +
	RX_MACRO_RX_PATH_OFFSET * (w->shift);		RX_MACRO_RX_PATH_OFFSET * (w->shift);
			fs_reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL +
			RX_MACRO_RX_PATH_OFFSET * (w->shift);

	switch (event) {		switch (event) {
	case SND_SOC_DAPM_PRE_PMU:		case SND_SOC_DAPM_PRE_PMU:
	rx_macro_enable_interp_clk(codec, event, w->shift);		rx_macro_enable_interp_clk(codec, event, w->shift);
			snd_soc_update_bits(codec, fs_reg, 0x20, 0x20);
	snd_soc_update_bits(codec, sidetone_reg, 0x10, 0x10);		snd_soc_update_bits(codec, sidetone_reg, 0x10, 0x10);
	break;		break;
	case SND_SOC_DAPM_POST_PMD:		case SND_SOC_DAPM_POST_PMD:
	@@ -3332,9 +3417,6 @@ static int rx_macro_init(struct snd_soc_codec *codec)
	snd_soc_dapm_ignore_suspend(dapm, "RX_TX DEC3_INP");		snd_soc_dapm_ignore_suspend(dapm, "RX_TX DEC3_INP");
	snd_soc_dapm_sync(dapm);		snd_soc_dapm_sync(dapm);

	snd_soc_update_bits(codec, BOLERO_CDC_RX_RX0_RX_PATH_DSM_CTL, 0x01, 0x01);
	snd_soc_update_bits(codec, BOLERO_CDC_RX_RX1_RX_PATH_DSM_CTL, 0x01, 0x01);
	snd_soc_update_bits(codec, BOLERO_CDC_RX_RX2_RX_PATH_DSM_CTL, 0x01, 0x01);
	snd_soc_update_bits(codec, BOLERO_CDC_RX_RX0_RX_PATH_SEC7, 0x07, 0x02);		snd_soc_update_bits(codec, BOLERO_CDC_RX_RX0_RX_PATH_SEC7, 0x07, 0x02);
	snd_soc_update_bits(codec, BOLERO_CDC_RX_RX1_RX_PATH_SEC7, 0x07, 0x02);		snd_soc_update_bits(codec, BOLERO_CDC_RX_RX1_RX_PATH_SEC7, 0x07, 0x02);
	snd_soc_update_bits(codec, BOLERO_CDC_RX_RX2_RX_PATH_SEC7, 0x07, 0x02);		snd_soc_update_bits(codec, BOLERO_CDC_RX_RX2_RX_PATH_SEC7, 0x07, 0x02);

asoc/codecs/bolero/wsa-macro.c

+118 −8

Original line number	Original line	Diff line number	Diff line
	@@ -90,6 +90,16 @@ enum {
	WSA_MACRO_SOFTCLIP_MAX		WSA_MACRO_SOFTCLIP_MAX
	};		};

			enum {
			INTn_1_INP_SEL_ZERO = 0,
			INTn_1_INP_SEL_RX0,
			INTn_1_INP_SEL_RX1,
			INTn_1_INP_SEL_RX2,
			INTn_1_INP_SEL_RX3,
			INTn_1_INP_SEL_DEC0,
			INTn_1_INP_SEL_DEC1,
			};

	struct interp_sample_rate {		struct interp_sample_rate {
	int sample_rate;		int sample_rate;
	int rate_val;		int rate_val;
	@@ -131,6 +141,7 @@ static int wsa_macro_hw_params(struct snd_pcm_substream *substream,
	static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,		static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,
	unsigned int tx_num, unsigned int tx_slot,		unsigned int tx_num, unsigned int tx_slot,
	unsigned int rx_num, unsigned int rx_slot);		unsigned int rx_num, unsigned int rx_slot);
			static int wsa_macro_digital_mute(struct snd_soc_dai *dai, int mute);
	/* Hold instance to soundwire platform device */		/* Hold instance to soundwire platform device */
	struct wsa_macro_swr_ctrl_data {		struct wsa_macro_swr_ctrl_data {
	struct platform_device *wsa_swr_pdev;		struct platform_device *wsa_swr_pdev;
	@@ -363,6 +374,7 @@ static const struct snd_kcontrol_new rx_mix_ec1_mux =
	static struct snd_soc_dai_ops wsa_macro_dai_ops = {		static struct snd_soc_dai_ops wsa_macro_dai_ops = {
	.hw_params = wsa_macro_hw_params,		.hw_params = wsa_macro_hw_params,
	.get_channel_map = wsa_macro_get_channel_map,		.get_channel_map = wsa_macro_get_channel_map,
			.digital_mute = wsa_macro_digital_mute,
	};		};

	static struct snd_soc_dai_driver wsa_macro_dai[] = {		static struct snd_soc_dai_driver wsa_macro_dai[] = {
	@@ -755,6 +767,49 @@ static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,
	return 0;		return 0;
	}		}

			static int wsa_macro_digital_mute(struct snd_soc_dai *dai, int mute)
			{
			struct snd_soc_codec *codec = dai->codec;
			struct device *wsa_dev = NULL;
			struct wsa_macro_priv *wsa_priv = NULL;
			uint16_t j = 0, reg = 0, mix_reg = 0, dsm_reg = 0;
			u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
			u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;

			if (mute)
			return 0;

			if (!wsa_macro_get_data(codec, &wsa_dev, &wsa_priv, __func__))
			return -EINVAL;

			switch (dai->id) {
			case WSA_MACRO_AIF1_PB:
			case WSA_MACRO_AIF_MIX1_PB:
			for (j = 0; j < NUM_INTERPOLATORS; j++) {
			reg = BOLERO_CDC_WSA_RX0_RX_PATH_CTL +
			(j * WSA_MACRO_RX_PATH_OFFSET);
			mix_reg = BOLERO_CDC_WSA_RX0_RX_PATH_MIX_CTL +
			(j * WSA_MACRO_RX_PATH_OFFSET);
			dsm_reg = BOLERO_CDC_WSA_RX0_RX_PATH_CTL +
			(j * WSA_MACRO_RX_PATH_OFFSET) +
			WSA_MACRO_RX_PATH_DSMDEM_OFFSET;
			int_mux_cfg0 = BOLERO_CDC_WSA_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
			int_mux_cfg1 = int_mux_cfg0 + 4;
			int_mux_cfg0_val = snd_soc_read(codec, int_mux_cfg0);
			int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1);
			if (snd_soc_read(codec, dsm_reg) & 0x01) {
			if (int_mux_cfg0_val \|\| (int_mux_cfg1_val & 0x38))
			snd_soc_update_bits(codec, reg, 0x20, 0x20);
			if (int_mux_cfg1_val & 0x07)
			snd_soc_update_bits(codec, mix_reg, 0x20, 0x20);
			}
			}
			break;
			default:
			break;
			}
			return 0;
			}
	static int wsa_macro_mclk_enable(struct wsa_macro_priv *wsa_priv,		static int wsa_macro_mclk_enable(struct wsa_macro_priv *wsa_priv,
	bool mclk_enable, bool dapm)		bool mclk_enable, bool dapm)
	{		{
	@@ -1082,6 +1137,7 @@ static int wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
	snd_soc_write(codec, gain_reg, val);		snd_soc_write(codec, gain_reg, val);
	break;		break;
	case SND_SOC_DAPM_POST_PMD:		case SND_SOC_DAPM_POST_PMD:
			snd_soc_update_bits(codec, w->reg, 0x20, 0x00);
	break;		break;
	}		}

	@@ -1281,6 +1337,55 @@ static int wsa_macro_config_softclip(struct snd_soc_codec *codec,
	return 0;		return 0;
	}		}

			static bool wsa_macro_adie_lb(struct snd_soc_codec *codec, int interp_idx)
			{
			u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
			u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;
			u8 int_n_inp0 = 0, int_n_inp1 = 0, int_n_inp2 = 0;

			int_mux_cfg0 = BOLERO_CDC_WSA_RX_INP_MUX_RX_INT0_CFG0 + interp_idx * 8;
			int_mux_cfg1 = int_mux_cfg0 + 4;
			int_mux_cfg0_val = snd_soc_read(codec, int_mux_cfg0);
			int_mux_cfg1_val = snd_soc_read(codec, int_mux_cfg1);

			int_n_inp0 = int_mux_cfg0_val & 0x0F;
			if (int_n_inp0 == INTn_1_INP_SEL_DEC0 \|\|
			int_n_inp0 == INTn_1_INP_SEL_DEC1)
			return true;

			int_n_inp1 = int_mux_cfg0_val >> 4;
			if (int_n_inp1 == INTn_1_INP_SEL_DEC0 \|\|
			int_n_inp1 == INTn_1_INP_SEL_DEC1)
			return true;

			int_n_inp2 = int_mux_cfg1_val >> 4;
			if (int_n_inp2 == INTn_1_INP_SEL_DEC0 \|\|
			int_n_inp2 == INTn_1_INP_SEL_DEC1)
			return true;

			return false;
			}

			static int wsa_macro_enable_main_path(struct snd_soc_dapm_widget *w,
			struct snd_kcontrol *kcontrol,
			int event)
			{
			struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
			u16 reg = 0;

			reg = BOLERO_CDC_WSA_RX0_RX_PATH_CTL +
			WSA_MACRO_RX_PATH_OFFSET * w->shift;
			switch (event) {
			case SND_SOC_DAPM_PRE_PMU:
			if (wsa_macro_adie_lb(codec, w->shift))
			snd_soc_update_bits(codec, reg, 0x20, 0x20);
			break;
			default:
			break;
			}
			return 0;
			}

	static int wsa_macro_interp_get_primary_reg(u16 reg, u16 *ind)		static int wsa_macro_interp_get_primary_reg(u16 reg, u16 *ind)
	{		{
	u16 prim_int_reg = 0;		u16 prim_int_reg = 0;
	@@ -1328,8 +1433,6 @@ static int wsa_macro_enable_prim_interpolator(
	snd_soc_update_bits(codec,		snd_soc_update_bits(codec,
	prim_int_reg + WSA_MACRO_RX_PATH_DSMDEM_OFFSET,		prim_int_reg + WSA_MACRO_RX_PATH_DSMDEM_OFFSET,
	0x1, 0x1);		0x1, 0x1);
	snd_soc_update_bits(codec, prim_int_reg,
	1 << 0x5, 1 << 0x5);
	}		}
	if ((reg != prim_int_reg) &&		if ((reg != prim_int_reg) &&
	((snd_soc_read(codec, prim_int_reg)) & 0x10))		((snd_soc_read(codec, prim_int_reg)) & 0x10))
	@@ -1340,6 +1443,9 @@ static int wsa_macro_enable_prim_interpolator(
	if (wsa_priv->prim_int_users[ind] == 0) {		if (wsa_priv->prim_int_users[ind] == 0) {
	snd_soc_update_bits(codec, prim_int_reg,		snd_soc_update_bits(codec, prim_int_reg,
	1 << 0x5, 0 << 0x5);		1 << 0x5, 0 << 0x5);
			snd_soc_update_bits(codec,
			prim_int_reg + WSA_MACRO_RX_PATH_DSMDEM_OFFSET,
			0x1, 0x0);
	snd_soc_update_bits(codec, prim_int_reg,		snd_soc_update_bits(codec, prim_int_reg,
	0x40, 0x40);		0x40, 0x40);
	snd_soc_update_bits(codec, prim_int_reg,		snd_soc_update_bits(codec, prim_int_reg,
	@@ -2281,8 +2387,8 @@ static const struct snd_soc_dapm_widget wsa_macro_dapm_widgets[] = {
	SND_SOC_DAPM_MUX_E("WSA_RX0 INP2", SND_SOC_NOPM, 0, 0,		SND_SOC_DAPM_MUX_E("WSA_RX0 INP2", SND_SOC_NOPM, 0, 0,
	&rx0_prim_inp2_mux, wsa_macro_enable_swr,		&rx0_prim_inp2_mux, wsa_macro_enable_swr,
	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),		SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),
	SND_SOC_DAPM_MUX_E("WSA_RX0 MIX INP", SND_SOC_NOPM, 0, 0,		SND_SOC_DAPM_MUX_E("WSA_RX0 MIX INP", BOLERO_CDC_WSA_RX0_RX_PATH_MIX_CTL,
	&rx0_mix_mux, wsa_macro_enable_mix_path,		0, 0, &rx0_mix_mux, wsa_macro_enable_mix_path,
	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),		SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),
	SND_SOC_DAPM_MUX_E("WSA_RX1 INP0", SND_SOC_NOPM, 0, 0,		SND_SOC_DAPM_MUX_E("WSA_RX1 INP0", SND_SOC_NOPM, 0, 0,
	&rx1_prim_inp0_mux, wsa_macro_enable_swr,		&rx1_prim_inp0_mux, wsa_macro_enable_swr,
	@@ -2293,11 +2399,15 @@ static const struct snd_soc_dapm_widget wsa_macro_dapm_widgets[] = {
	SND_SOC_DAPM_MUX_E("WSA_RX1 INP2", SND_SOC_NOPM, 0, 0,		SND_SOC_DAPM_MUX_E("WSA_RX1 INP2", SND_SOC_NOPM, 0, 0,
	&rx1_prim_inp2_mux, wsa_macro_enable_swr,		&rx1_prim_inp2_mux, wsa_macro_enable_swr,
	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),		SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),
	SND_SOC_DAPM_MUX_E("WSA_RX1 MIX INP", SND_SOC_NOPM, 0, 0,		SND_SOC_DAPM_MUX_E("WSA_RX1 MIX INP", BOLERO_CDC_WSA_RX1_RX_PATH_MIX_CTL,
	&rx1_mix_mux, wsa_macro_enable_mix_path,		0, 0, &rx1_mix_mux, wsa_macro_enable_mix_path,
	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),		SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),
	SND_SOC_DAPM_MIXER("WSA_RX INT0 MIX", SND_SOC_NOPM, 0, 0, NULL, 0),		SND_SOC_DAPM_MIXER_E("WSA_RX INT0 MIX", SND_SOC_NOPM,
	SND_SOC_DAPM_MIXER("WSA_RX INT1 MIX", SND_SOC_NOPM, 0, 0, NULL, 0),		0, 0, NULL, 0, wsa_macro_enable_main_path,
			SND_SOC_DAPM_PRE_PMU),
			SND_SOC_DAPM_MIXER_E("WSA_RX INT1 MIX", SND_SOC_NOPM,
			1, 0, NULL, 0, wsa_macro_enable_main_path,
			SND_SOC_DAPM_PRE_PMU),
	SND_SOC_DAPM_MIXER("WSA_RX INT0 SEC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),		SND_SOC_DAPM_MIXER("WSA_RX INT0 SEC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_MIXER("WSA_RX INT1 SEC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),		SND_SOC_DAPM_MIXER("WSA_RX INT1 SEC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),