Loading Documentation/devicetree/bindings/interrupt-controller/qti,pdc.txt +19 −1 Original line number Diff line number Diff line Loading @@ -32,7 +32,8 @@ Properties: "qcom,pdc-sm6150", "qcom,pdc-sm8150", "qcom,pdc-sdxprairie", "qcom,pdc-atoll" "qcom,pdc-atoll", "qcom,pdc-virt" - reg: Usage: required Loading @@ -58,6 +59,14 @@ Properties: Value type: <bool> Definition: Identifies the node as an interrupt controller. - qcom,pdc-pins: Usage: optional Value type: <u32 array> Definition: Specifies the PDC pin and its mapping hwirq. The first element of the tuple is the PDC port. The second element is the GIC hwirq number for the PDC port. Usage is required when using "qcom,pdc-virt" as compatible. Example: pdcgic: interrupt-controller@0xb220000{ Loading @@ -67,3 +76,12 @@ pdcgic: interrupt-controller@0xb220000{ interrupt-parent = <&intc>; interrupt-controller; }; pdcgic: interrupt-controller@0xb220000{ compatible = "qcom,pdc-virt"; reg = <0xb220000 0x30000>; #interrupt-cells = <3>; interrupt-parent = <&intc>; interrupt-controller; qcom,pdc-pins = <8 520>, <9 521>; }; drivers/irqchip/qcom/Kconfig +17 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ config QTI_PDC config QTI_PDC_SM8150 bool "QTI PDC SM8150" select QTI_PDC select QTI_PDC_SAVE_RESTORE default y if ARCH_SM8150 help QTI Power Domain Controller for SM8150 Loading @@ -17,6 +18,7 @@ config QTI_PDC_SM8150 config QTI_PDC_SM6150 bool "QTI PDC SM6150" select QTI_PDC select QTI_PDC_SAVE_RESTORE default y if ARCH_SM6150 help QTI Power Domain Controller for SM6150 Loading Loading @@ -58,3 +60,18 @@ config QTI_MPM help QTI MSM Power Manager driver to manage and configure wakeup IRQs. config QTI_PDC_VIRT bool "QTI PDC VIRT" select QTI_PDC help QTI Power Domain Controller for Virtual platforms This is used for managing and configuring the wakeup interrupts on virtual platforms. config QTI_PDC_SAVE_RESTORE bool "QTI PDC SAVE RESTORE" depends on QTI_PDC help Enables the QTI PDC feature to save/restore pin configurations during suspend/resume. drivers/irqchip/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -6,3 +6,4 @@ obj-$(CONFIG_QTI_PDC_SDXPRAIRIE) += pdc-sdxprairie.o obj-$(CONFIG_QTI_PDC_ATOLL) += pdc-atoll.o obj-$(CONFIG_QTI_MPM) += mpm.o mpm-8937.o mpm-qcs405.o mpm-trinket.o \ mpm-9607.o mpm-sdm660.o obj-$(CONFIG_QTI_PDC_VIRT) += pdc-virt.o No newline at end of file drivers/irqchip/qcom/pdc-virt.c 0 → 100644 +77 −0 Original line number Diff line number Diff line /* Copyright (c) 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #include <linux/irqchip.h> #include "pdc.h" static struct pdc_pin *pdc_pins_dt; static int pdc_read_pin_mapping_from_dt(struct device_node *node) { int ret = 0, n; int pdc_pin_count; n = of_property_count_elems_of_size(node, "qcom,pdc-pins", sizeof(u32)); if (n <= 0 || n % 2) return -EINVAL; pdc_pin_count = n / 2; pdc_pins_dt = kcalloc(pdc_pin_count + 1, sizeof(struct pdc_pin), GFP_KERNEL); if (!pdc_pins_dt) return -ENOMEM; for (n = 0; n < pdc_pin_count; n++) { ret = of_property_read_u32_index(node, "qcom,pdc-pins", n * 2, &pdc_pins_dt[n].pin); if (ret) goto err; ret = of_property_read_u32_index(node, "qcom,pdc-pins", (n * 2) + 1, (u32 *)&pdc_pins_dt[n].hwirq); if (ret) goto err; } pdc_pins_dt[pdc_pin_count].pin = -1; return ret; err: kfree(pdc_pins_dt); return ret; } static int __init qcom_pdc_gic_init(struct device_node *node, struct device_node *parent) { int ret; ret = pdc_read_pin_mapping_from_dt(node); if (ret) { pr_err("%s: Error reading PDC pin mapping: %d\n", __func__, ret); return ret; } ret = qcom_pdc_init(node, parent, pdc_pins_dt); pr_info("PDC virt initialized\n"); return ret; } IRQCHIP_DECLARE(pdc_virt, "qcom,pdc-virt", qcom_pdc_gic_init); drivers/irqchip/qcom/pdc.c +4 −1 Original line number Diff line number Diff line Loading @@ -48,7 +48,6 @@ struct pdc_type_info { bool set; }; static struct pdc_type_info pdc_type_config[MAX_IRQS]; static u32 pdc_enabled[MAX_ENABLE_REGS]; static u32 max_enable_regs; static DEFINE_SPINLOCK(pdc_lock); static void __iomem *pdc_base; Loading Loading @@ -289,6 +288,9 @@ static const struct irq_domain_ops qcom_pdc_ops = { .free = irq_domain_free_irqs_common, }; #ifdef CONFIG_QTI_PDC_SAVE_RESTORE static u32 pdc_enabled[MAX_ENABLE_REGS]; static int pdc_suspend(void) { int i; Loading Loading @@ -336,6 +338,7 @@ static int __init pdc_init_syscore(void) return 0; } arch_initcall(pdc_init_syscore); #endif int qcom_pdc_init(struct device_node *node, struct device_node *parent, void *data) Loading Loading
Documentation/devicetree/bindings/interrupt-controller/qti,pdc.txt +19 −1 Original line number Diff line number Diff line Loading @@ -32,7 +32,8 @@ Properties: "qcom,pdc-sm6150", "qcom,pdc-sm8150", "qcom,pdc-sdxprairie", "qcom,pdc-atoll" "qcom,pdc-atoll", "qcom,pdc-virt" - reg: Usage: required Loading @@ -58,6 +59,14 @@ Properties: Value type: <bool> Definition: Identifies the node as an interrupt controller. - qcom,pdc-pins: Usage: optional Value type: <u32 array> Definition: Specifies the PDC pin and its mapping hwirq. The first element of the tuple is the PDC port. The second element is the GIC hwirq number for the PDC port. Usage is required when using "qcom,pdc-virt" as compatible. Example: pdcgic: interrupt-controller@0xb220000{ Loading @@ -67,3 +76,12 @@ pdcgic: interrupt-controller@0xb220000{ interrupt-parent = <&intc>; interrupt-controller; }; pdcgic: interrupt-controller@0xb220000{ compatible = "qcom,pdc-virt"; reg = <0xb220000 0x30000>; #interrupt-cells = <3>; interrupt-parent = <&intc>; interrupt-controller; qcom,pdc-pins = <8 520>, <9 521>; };
drivers/irqchip/qcom/Kconfig +17 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ config QTI_PDC config QTI_PDC_SM8150 bool "QTI PDC SM8150" select QTI_PDC select QTI_PDC_SAVE_RESTORE default y if ARCH_SM8150 help QTI Power Domain Controller for SM8150 Loading @@ -17,6 +18,7 @@ config QTI_PDC_SM8150 config QTI_PDC_SM6150 bool "QTI PDC SM6150" select QTI_PDC select QTI_PDC_SAVE_RESTORE default y if ARCH_SM6150 help QTI Power Domain Controller for SM6150 Loading Loading @@ -58,3 +60,18 @@ config QTI_MPM help QTI MSM Power Manager driver to manage and configure wakeup IRQs. config QTI_PDC_VIRT bool "QTI PDC VIRT" select QTI_PDC help QTI Power Domain Controller for Virtual platforms This is used for managing and configuring the wakeup interrupts on virtual platforms. config QTI_PDC_SAVE_RESTORE bool "QTI PDC SAVE RESTORE" depends on QTI_PDC help Enables the QTI PDC feature to save/restore pin configurations during suspend/resume.
drivers/irqchip/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -6,3 +6,4 @@ obj-$(CONFIG_QTI_PDC_SDXPRAIRIE) += pdc-sdxprairie.o obj-$(CONFIG_QTI_PDC_ATOLL) += pdc-atoll.o obj-$(CONFIG_QTI_MPM) += mpm.o mpm-8937.o mpm-qcs405.o mpm-trinket.o \ mpm-9607.o mpm-sdm660.o obj-$(CONFIG_QTI_PDC_VIRT) += pdc-virt.o No newline at end of file
drivers/irqchip/qcom/pdc-virt.c 0 → 100644 +77 −0 Original line number Diff line number Diff line /* Copyright (c) 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #include <linux/irqchip.h> #include "pdc.h" static struct pdc_pin *pdc_pins_dt; static int pdc_read_pin_mapping_from_dt(struct device_node *node) { int ret = 0, n; int pdc_pin_count; n = of_property_count_elems_of_size(node, "qcom,pdc-pins", sizeof(u32)); if (n <= 0 || n % 2) return -EINVAL; pdc_pin_count = n / 2; pdc_pins_dt = kcalloc(pdc_pin_count + 1, sizeof(struct pdc_pin), GFP_KERNEL); if (!pdc_pins_dt) return -ENOMEM; for (n = 0; n < pdc_pin_count; n++) { ret = of_property_read_u32_index(node, "qcom,pdc-pins", n * 2, &pdc_pins_dt[n].pin); if (ret) goto err; ret = of_property_read_u32_index(node, "qcom,pdc-pins", (n * 2) + 1, (u32 *)&pdc_pins_dt[n].hwirq); if (ret) goto err; } pdc_pins_dt[pdc_pin_count].pin = -1; return ret; err: kfree(pdc_pins_dt); return ret; } static int __init qcom_pdc_gic_init(struct device_node *node, struct device_node *parent) { int ret; ret = pdc_read_pin_mapping_from_dt(node); if (ret) { pr_err("%s: Error reading PDC pin mapping: %d\n", __func__, ret); return ret; } ret = qcom_pdc_init(node, parent, pdc_pins_dt); pr_info("PDC virt initialized\n"); return ret; } IRQCHIP_DECLARE(pdc_virt, "qcom,pdc-virt", qcom_pdc_gic_init);
drivers/irqchip/qcom/pdc.c +4 −1 Original line number Diff line number Diff line Loading @@ -48,7 +48,6 @@ struct pdc_type_info { bool set; }; static struct pdc_type_info pdc_type_config[MAX_IRQS]; static u32 pdc_enabled[MAX_ENABLE_REGS]; static u32 max_enable_regs; static DEFINE_SPINLOCK(pdc_lock); static void __iomem *pdc_base; Loading Loading @@ -289,6 +288,9 @@ static const struct irq_domain_ops qcom_pdc_ops = { .free = irq_domain_free_irqs_common, }; #ifdef CONFIG_QTI_PDC_SAVE_RESTORE static u32 pdc_enabled[MAX_ENABLE_REGS]; static int pdc_suspend(void) { int i; Loading Loading @@ -336,6 +338,7 @@ static int __init pdc_init_syscore(void) return 0; } arch_initcall(pdc_init_syscore); #endif int qcom_pdc_init(struct device_node *node, struct device_node *parent, void *data) Loading