Loading arch/arm64/boot/dts/qcom/atoll-qrd.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -96,6 +96,34 @@ }; }; &qupv3_se7_i2c { status = "ok"; synaptics_tcm@20 { compatible = "synaptics,tcm-i2c"; reg = <0x20>; interrupt-parent = <&tlmm>; interrupts = <9 0x2008>; pinctrl-names = "pmx_ts_active","pmx_ts_suspend", "pmx_ts_release"; pinctrl-0 = <&ts_active>; pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; pinctrl-2 = <&ts_release>; vdd-supply = <&pm6150_l10>; avdd-supply = <&pm6150l_l7>; synaptics,pwr-reg-name = "avdd"; synaptics,bus-reg-name = "vdd"; synaptics,irq-gpio = <&tlmm 9 0x2008>; synaptics,irq-on-state = <0>; synaptics,reset-gpio = <&tlmm 8 0x00>; synaptics,reset-on-state = <0>; synaptics,reset-active-ms = <20>; synaptics,reset-delay-ms = <200>; synaptics,power-delay-ms = <200>; synaptics,ubl-i2c-addr = <0x20>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v3"; Loading Loading
arch/arm64/boot/dts/qcom/atoll-qrd.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -96,6 +96,34 @@ }; }; &qupv3_se7_i2c { status = "ok"; synaptics_tcm@20 { compatible = "synaptics,tcm-i2c"; reg = <0x20>; interrupt-parent = <&tlmm>; interrupts = <9 0x2008>; pinctrl-names = "pmx_ts_active","pmx_ts_suspend", "pmx_ts_release"; pinctrl-0 = <&ts_active>; pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; pinctrl-2 = <&ts_release>; vdd-supply = <&pm6150_l10>; avdd-supply = <&pm6150l_l7>; synaptics,pwr-reg-name = "avdd"; synaptics,bus-reg-name = "vdd"; synaptics,irq-gpio = <&tlmm 9 0x2008>; synaptics,irq-on-state = <0>; synaptics,reset-gpio = <&tlmm 8 0x00>; synaptics,reset-on-state = <0>; synaptics,reset-active-ms = <20>; synaptics,reset-delay-ms = <200>; synaptics,power-delay-ms = <200>; synaptics,ubl-i2c-addr = <0x20>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v3"; Loading