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Commit fcf1e573 authored by Prudhvi Yarlagadda's avatar Prudhvi Yarlagadda Committed by Venkata Manasa Kakarla
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msm-geni-serial: Correct the interrupt polling logic in uart 



Correct the interrupt polling logic in uart and depend on the
interrupt routine instead of polling where ever possible.

Change-Id: I7a2a8164d2dabf74755305a9c34a45e0eaec425d
Signed-off-by: default avatarPrudhvi Yarlagadda <pyarlaga@codeaurora.org>
Signed-off-by: default avatarVenkata Manasa Kakarla <venkka@codeaurora.org>
parent 2e2aaef5

drivers/tty/serial/msm_geni_serial.c

+643 −292

File changed.

Preview size limit exceeded, changes collapsed.

include/linux/qcom-geni-se.h

+8 −1
Original line number Diff line number Diff line
@@ -382,6 +382,7 @@ struct se_geni_rsc { 
#define TX_EOT			(BIT(1))

#define TX_SBE			(BIT(2))

#define TX_RESET_DONE		(BIT(3))

#define TX_GENI_CANCEL_IRQ	(BIT(14))



/* SE_DMA_RX_IRQ_STAT Register fields */

#define RX_DMA_DONE		(BIT(0))
@@ -390,9 +391,15 @@ struct se_geni_rsc { 
#define RX_RESET_DONE		(BIT(3))

#define RX_FLUSH_DONE		(BIT(4))

#define RX_GENI_GP_IRQ		(GENMASK(10, 5))

#define RX_GENI_CANCEL_IRQ	(BIT(11))

#define RX_GENI_CANCEL_IRQ	(BIT(14))

#define RX_GENI_GP_IRQ_EXT	(GENMASK(13, 12))



/* DMA DEBUG Register fields */

#define DMA_TX_ACTIVE		(BIT(0))

#define DMA_RX_ACTIVE		(BIT(1))

#define DMA_TX_STATE		(GENMASK(7, 4))

#define DMA_RX_STATE		(GENMASK(11, 8))



#define DEFAULT_BUS_WIDTH	(4)

#define DEFAULT_SE_CLK		(19200000)