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Commit fcc50e5c authored by Qipan Li's avatar Qipan Li Committed by Mark Brown
Browse files

spi: sirf: assign spi_master's max_speed_hz member 



if spi device has no frequency, spi core will setup the default frequency
to max_speed_hz of spi_master according to
int spi_setup(struct spi_device *spi)
{
	...
        if (!spi->max_speed_hz)
                spi->max_speed_hz = spi->master->max_speed_hz;
	...
}
this patch moves CSR SiRFSoC SPI frequency set to follow SPI core behaviour.

Signed-off-by: default avatarQipan Li <Qipan.Li@csr.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent f114040e

drivers/spi/spi-sirf.c

+2 −3
Original line number Diff line number Diff line
@@ -134,6 +134,7 @@ 
	ALIGNED(x->len) && (x->len < 2 * PAGE_SIZE))



#define SIRFSOC_MAX_CMD_BYTES	4

#define SIRFSOC_SPI_DEFAULT_FRQ 1000000



struct sirfsoc_spi {

	struct spi_bitbang bitbang;
@@ -629,9 +630,6 @@ static int spi_sirfsoc_setup(struct spi_device *spi) 
{

	struct sirfsoc_spi *sspi;



	if (!spi->max_speed_hz)

		return -EINVAL;



	sspi = spi_master_get_devdata(spi->master);



	if (spi->cs_gpio == -ENOENT)
@@ -683,6 +681,7 @@ static int spi_sirfsoc_probe(struct platform_device *pdev) 
	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH;

	master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(12) |

					SPI_BPW_MASK(16) | SPI_BPW_MASK(32);

	master->max_speed_hz = SIRFSOC_SPI_DEFAULT_FRQ;

	sspi->bitbang.master->dev.of_node = pdev->dev.of_node;



	/* request DMA channels */