Loading arch/arm64/boot/dts/qcom/sdxprairie-v2-pcie-ep-mtp.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -20,3 +20,27 @@ &restart_pshold { qcom,force-warm-reboot; }; &pcie0 { status = "disabled"; }; &cnss_qca6390 { status = "disabled"; }; &ipa_hw { qcom,use-ipa-in-mhi-mode; }; &pcie_ep { status = "ok"; }; &mhi_device { status = "ok"; }; &mhi_net_device { status = "ok"; }; drivers/platform/msm/ep_pcie/ep_pcie_core.c +0 −1 Original line number Diff line number Diff line Loading @@ -566,7 +566,6 @@ static void ep_pcie_config_mmio(struct ep_pcie_dev_t *dev) ep_pcie_write_reg(dev->mmio, PCIE20_MHIVER, 0x1000000); ep_pcie_write_reg(dev->mmio, PCIE20_BHI_VERSION_LOWER, 0x2); ep_pcie_write_reg(dev->mmio, PCIE20_BHI_VERSION_UPPER, 0x1); ep_pcie_write_reg(dev->mmio, PCIE20_BHI_INTVEC, 0xffffffff); dev->config_mmio_init = true; } Loading Loading
arch/arm64/boot/dts/qcom/sdxprairie-v2-pcie-ep-mtp.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -20,3 +20,27 @@ &restart_pshold { qcom,force-warm-reboot; }; &pcie0 { status = "disabled"; }; &cnss_qca6390 { status = "disabled"; }; &ipa_hw { qcom,use-ipa-in-mhi-mode; }; &pcie_ep { status = "ok"; }; &mhi_device { status = "ok"; }; &mhi_net_device { status = "ok"; };
drivers/platform/msm/ep_pcie/ep_pcie_core.c +0 −1 Original line number Diff line number Diff line Loading @@ -566,7 +566,6 @@ static void ep_pcie_config_mmio(struct ep_pcie_dev_t *dev) ep_pcie_write_reg(dev->mmio, PCIE20_MHIVER, 0x1000000); ep_pcie_write_reg(dev->mmio, PCIE20_BHI_VERSION_LOWER, 0x2); ep_pcie_write_reg(dev->mmio, PCIE20_BHI_VERSION_UPPER, 0x1); ep_pcie_write_reg(dev->mmio, PCIE20_BHI_INTVEC, 0xffffffff); dev->config_mmio_init = true; } Loading