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Commit fc4a6645 authored by Yue Ma's avatar Yue Ma
Browse files

cnss2: Set proper SMMU attributes for collecting firmware RAM dump 



Once SMMU stage 1 is enabled, set DOMAIN_ATTR_CB_STALL_DISABLE and
DOMAIN_ATTR_NO_CFRE SMMU attributes to disable context bank stall and
error fatal so that it is still able to collect firmware RAM dump over
PCIe bus even after SMMU fault happens.

Change-Id: Ifdab4f81ee0703de20bc617dc5cfd37e32fd8b51
Signed-off-by: default avatarYue Ma <yuem@codeaurora.org>
parent 315ed7f6

drivers/net/wireless/cnss2/pci.c

+20 −3
Original line number Diff line number Diff line
@@ -780,9 +780,8 @@ static int cnss_pci_init_smmu(struct cnss_pci_data *pci_priv) 
	int ret = 0;

	struct device *dev;

	struct dma_iommu_mapping *mapping;

	int atomic_ctx = 1;

	int s1_bypass = 1;

	int fast = 1;

	int atomic_ctx = 1, s1_bypass = 1, fast = 1, cb_stall_disable = 1,

		no_cfre = 1;



	cnss_pr_dbg("Initializing SMMU\n");
@@ -817,6 +816,24 @@ static int cnss_pci_init_smmu(struct cnss_pci_data *pci_priv) 
			       ret);

			goto release_mapping;

		}



		ret = iommu_domain_set_attr(mapping->domain,

					    DOMAIN_ATTR_CB_STALL_DISABLE,

					    &cb_stall_disable);

		if (ret) {

			pr_err("Failed to set SMMU cb_stall_disable attribute, err = %d\n",

			       ret);

			goto release_mapping;

		}



		ret = iommu_domain_set_attr(mapping->domain,

					    DOMAIN_ATTR_NO_CFRE,

					    &no_cfre);

		if (ret) {

			pr_err("Failed to set SMMU no_cfre attribute, err = %d\n",

			       ret);

			goto release_mapping;

		}

	} else {

		ret = iommu_domain_set_attr(mapping->domain,

					    DOMAIN_ATTR_S1_BYPASS,