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Commit fc206543 authored by Robert Jarzmik's avatar Robert Jarzmik Committed by Stephen Boyd
Browse files

clk: pxa: export 32kHz PLL 



This clock is especially used by the RTC driver, so export it so that
devicetree users can use it.

Signed-off-by: default avatarRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent ce397d21

drivers/clk/pxa/clk-pxa25x.c

+4 −2
Original line number Diff line number Diff line
@@ -292,8 +292,10 @@ static void __init pxa25x_register_plls(void) 
{

	clk_register_fixed_rate(NULL, "osc_3_6864mhz", NULL,

				CLK_GET_RATE_NOCACHE, 3686400);

	clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,

			    clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,

				CLK_GET_RATE_NOCACHE, 32768);

						    CLK_GET_RATE_NOCACHE,

						    32768));

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);

	clk_register_fixed_factor(NULL, "ppll_95_85mhz", "osc_3_6864mhz",

				  0, 26, 1);

drivers/clk/pxa/clk-pxa27x.c

+4 −3
Original line number Diff line number Diff line
@@ -314,9 +314,10 @@ static void __init pxa27x_register_plls(void) 
	clk_register_fixed_rate(NULL, "osc_13mhz", NULL,

				CLK_GET_RATE_NOCACHE,

				13 * MHz);

	clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,

			    clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,

						    CLK_GET_RATE_NOCACHE,

				32768 * KHz);

						    32768 * KHz));

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);

	clk_register_fixed_factor(NULL, "ppll_312mhz", "osc_13mhz", 0, 24, 1);

}

drivers/clk/pxa/clk-pxa3xx.c

+4 −3
Original line number Diff line number Diff line
@@ -286,9 +286,10 @@ static void __init pxa3xx_register_plls(void) 
	clk_register_fixed_rate(NULL, "osc_13mhz", NULL,

				CLK_GET_RATE_NOCACHE,

				13 * MHz);

	clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,

			    clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,

						    CLK_GET_RATE_NOCACHE,

				32768);

						    32768));

	clk_register_fixed_rate(NULL, "ring_osc_120mhz", NULL,

				CLK_GET_RATE_NOCACHE,

				120 * MHz);

include/dt-bindings/clock/pxa-clock.h

+2 −1
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ 
#define CLK_USIM 58

#define CLK_USIM1 59

#define CLK_USMI0 60

#define CLK_MAX 61

#define CLK_OSC32k768 61

#define CLK_MAX 62



#endif