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Commit fa433354 authored by David S. Miller's avatar David S. Miller
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Merge tag 'wireless-drivers-next-for-davem-2015-06-18' of...

Merge tag 'wireless-drivers-next-for-davem-2015-06-18' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next



Kalle Valo says:

====================
Major changes:

mwifiex:

* enhancements for AP mode: support verbose information in station
  dump command and also information about AP link.
* enable power save by default

brcmfmac:

* fix module reload issue for PCIe
* improving msgbuf protocol for PCIe devices
* rework .get_station() cfg80211 callback operation
* determine interface combinations upon device feature support

ath9k:

* ath9k_htc: add support of channel switch

wil6210:

* add modparam for bcast ring size
* support hidden SSID
* add per-MCS Rx stats
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 10ea5165 40b503c7
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+0 −2
Original line number Original line Diff line number Diff line
@@ -8169,8 +8169,6 @@ P: rt2x00 project
M:	Stanislaw Gruszka <sgruszka@redhat.com>
M:	Stanislaw Gruszka <sgruszka@redhat.com>
M:	Helmut Schaa <helmut.schaa@googlemail.com>
M:	Helmut Schaa <helmut.schaa@googlemail.com>
L:	linux-wireless@vger.kernel.org
L:	linux-wireless@vger.kernel.org
L:	users@rt2x00.serialmonkey.com (moderated for non-subscribers)
W:	http://rt2x00.serialmonkey.com/
S:	Maintained
S:	Maintained
F:	drivers/net/wireless/rt2x00/
F:	drivers/net/wireless/rt2x00/


+6 −6
Original line number Original line Diff line number Diff line
@@ -29,12 +29,6 @@ config BCMA_HOST_PCI
	select BCMA_DRIVER_PCI
	select BCMA_DRIVER_PCI
	default y
	default y


config BCMA_DRIVER_PCI_HOSTMODE
	bool "Driver for PCI core working in hostmode"
	depends on BCMA && MIPS && BCMA_HOST_PCI
	help
	  PCI core hostmode operation (external PCI bus).

config BCMA_HOST_SOC
config BCMA_HOST_SOC
	bool "Support for BCMA in a SoC"
	bool "Support for BCMA in a SoC"
	depends on BCMA
	depends on BCMA
@@ -61,6 +55,12 @@ config BCMA_DRIVER_PCI
	  This driver is also prerequisite for a hostmode PCIe core
	  This driver is also prerequisite for a hostmode PCIe core
	  support.
	  support.


config BCMA_DRIVER_PCI_HOSTMODE
	bool "Driver for PCI core working in hostmode"
	depends on BCMA && MIPS && BCMA_DRIVER_PCI
	help
	  PCI core hostmode operation (external PCI bus).

config BCMA_DRIVER_MIPS
config BCMA_DRIVER_MIPS
	bool "BCMA Broadcom MIPS core driver"
	bool "BCMA Broadcom MIPS core driver"
	depends on BCMA && MIPS
	depends on BCMA && MIPS
+17 −0
Original line number Original line Diff line number Diff line
@@ -48,6 +48,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.name = "qca988x hw2.0",
		.name = "qca988x hw2.0",
		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
		.uart_pin = 7,
		.uart_pin = 7,
		.has_shifted_cc_wraparound = true,
		.fw = {
		.fw = {
			.dir = QCA988X_HW_2_0_FW_DIR,
			.dir = QCA988X_HW_2_0_FW_DIR,
			.fw = QCA988X_HW_2_0_FW_FILE,
			.fw = QCA988X_HW_2_0_FW_FILE,
@@ -1084,6 +1085,22 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
	if (status)
	if (status)
		goto err;
		goto err;


	/* Some of of qca988x solutions are having global reset issue
         * during target initialization. Bypassing PLL setting before
         * downloading firmware and letting the SoC run on REF_CLK is
         * fixing the problem. Corresponding firmware change is also needed
         * to set the clock source once the target is initialized.
	 */
	if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
		     ar->fw_features)) {
		status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
		if (status) {
			ath10k_err(ar, "could not write to skip_clock_init: %d\n",
				   status);
			goto err;
		}
	}

	status = ath10k_download_fw(ar, mode);
	status = ath10k_download_fw(ar, mode);
	if (status)
	if (status)
		goto err;
		goto err;
+18 −9
Original line number Original line Diff line number Diff line
@@ -284,15 +284,6 @@ struct ath10k_sta {
#endif
#endif
};
};


struct ath10k_chanctx {
	/* Used to story copy of chanctx_conf to avoid inconsistencies. Ideally
	 * mac80211 should allow some sort of explicit locking to guarantee
	 * that the publicly available chanctx_conf can be accessed safely at
	 * all times.
	 */
	struct ieee80211_chanctx_conf conf;
};

#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)


enum ath10k_beacon_state {
enum ath10k_beacon_state {
@@ -468,6 +459,9 @@ enum ath10k_fw_features {
	 */
	 */
	ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
	ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,


	/* Firmware supports bypassing PLL setting on init. */
	ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,

	/* keep last */
	/* keep last */
	ATH10K_FW_FEATURE_COUNT,
	ATH10K_FW_FEATURE_COUNT,
};
};
@@ -577,6 +571,13 @@ struct ath10k {
		u32 patch_load_addr;
		u32 patch_load_addr;
		int uart_pin;
		int uart_pin;


		/* This is true if given HW chip has a quirky Cycle Counter
		 * wraparound which resets to 0x7fffffff instead of 0. All
		 * other CC related counters (e.g. Rx Clear Count) are divided
		 * by 2 so they never wraparound themselves.
		 */
		bool has_shifted_cc_wraparound;

		struct ath10k_hw_params_fw {
		struct ath10k_hw_params_fw {
			const char *dir;
			const char *dir;
			const char *fw;
			const char *fw;
@@ -694,6 +695,14 @@ struct ath10k {
	u32 survey_last_cycle_count;
	u32 survey_last_cycle_count;
	struct survey_info survey[ATH10K_NUM_CHANS];
	struct survey_info survey[ATH10K_NUM_CHANS];


	/* Channel info events are expected to come in pairs without and with
	 * COMPLETE flag set respectively for each channel visit during scan.
	 *
	 * However there are deviations from this rule. This flag is used to
	 * avoid reporting garbage data.
	 */
	bool ch_info_can_report_survey;

	struct dfs_pattern_detector *dfs_detector;
	struct dfs_pattern_detector *dfs_detector;


	unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
	unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
+21 −0
Original line number Original line Diff line number Diff line
@@ -15,6 +15,7 @@
 */
 */


#include <linux/types.h>
#include <linux/types.h>
#include "core.h"
#include "hw.h"
#include "hw.h"


const struct ath10k_hw_regs qca988x_regs = {
const struct ath10k_hw_regs qca988x_regs = {
@@ -56,3 +57,23 @@ const struct ath10k_hw_regs qca6174_regs = {
	.soc_chip_id_address			= 0x000f0,
	.soc_chip_id_address			= 0x000f0,
	.scratch_3_address			= 0x0028,
	.scratch_3_address			= 0x0028,
};
};

void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
				u32 cc, u32 rcc, u32 cc_prev, u32 rcc_prev)
{
	u32 cc_fix = 0;

	survey->filled |= SURVEY_INFO_TIME |
			  SURVEY_INFO_TIME_BUSY;

	if (ar->hw_params.has_shifted_cc_wraparound && cc < cc_prev) {
		cc_fix = 0x7fffffff;
		survey->filled &= ~SURVEY_INFO_TIME_BUSY;
	}

	cc -= cc_prev - cc_fix;
	rcc -= rcc_prev;

	survey->time = CCNT_TO_MSEC(cc);
	survey->time_busy = CCNT_TO_MSEC(rcc);
}
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