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Commit f887e24e authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/host-iproc' into next 

* pci/host-iproc:
  PCI: iproc: Skip check for legacy IRQ on PAXC buses
  PCI: iproc: Fix incorrect MSI address alignment
  PCI: iproc: Add support for the next-gen PAXB controller
  PCI: iproc: Add PAXBv2 binding info
  PCI: iproc: Add inbound DMA mapping support
  PCI: iproc: Add optional dma-ranges
  PCI: iproc: Make outbound mapping code more generic
  PCI: iproc: Remove redundant outbound properties
  PCI: iproc: Add PAXC v2 support
  PCI: iproc: Add PAXCv2 related binding
  PCI: iproc: Fix exception with multi-function devices
  PCI: iproc: Add BCMA type
  PCI: iproc: Do not reset PAXC when initializing the driver
  PCI: iproc: Improve core register population
parents 36e649f3 ffbd7968

Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt

+28 −15
Original line number Diff line number Diff line 
* Broadcom iProc PCIe controller with the platform bus interface



Required properties:

- compatible: Must be "brcm,iproc-pcie" for PAXB, or "brcm,iproc-pcie-paxc"

  for PAXC.  PAXB-based root complex is used for external endpoint devices.

  PAXC-based root complex is connected to emulated endpoint devices

  internal to the ASIC

- compatible:

      "brcm,iproc-pcie" for the first generation of PAXB based controller,

used in SoCs including NSP, Cygnus, NS2, and Pegasus

      "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based

controllers, used in Stingray

      "brcm,iproc-pcie-paxc" for the first generation of PAXC based

controller, used in NS2

      "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based

controller, used in Stingray

  PAXB-based root complex is used for external endpoint devices. PAXC-based

root complex is connected to emulated endpoint devices internal to the ASIC

- reg: base address and length of the PCIe controller I/O register space

- #interrupt-cells: set to <1>

- interrupt-map-mask and interrupt-map, standard PCI properties to define the
@@ -19,6 +26,10 @@ Required properties: 
Optional properties:

- phys: phandle of the PCIe PHY device

- phy-names: must be "pcie-phy"

- dma-coherent: present if DMA operations are coherent

- dma-ranges: Some PAXB-based root complexes do not have inbound mapping done

  by the ASIC after power on reset.  In this case, SW is required to configure

the mapping, based on inbound memory regions specified by this property.



- brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done

by the ASIC after power on reset. In this case, SW needs to configure it
@@ -29,11 +40,6 @@ effective: 
Required:

- brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal

address used by the iProc PCIe core (not the PCIe address)

- brcm,pcie-ob-window-size: The outbound address mapping window size (in MB)



Optional:

- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to

increase the outbound window size



MSI support (optional):
@@ -41,10 +47,19 @@ For older platforms without MSI integrated in the GIC, iProc PCIe core provides 
an event queue based MSI support.  The iProc MSI uses host memories to store

MSI posted writes in the event queues



- msi-parent: Link to the device node of the MSI controller.  On newer iProc

platforms, the MSI controller may be gicv2m or gicv3-its.  On older iProc

platforms without MSI support in its interrupt controller, one may use the

event queue based MSI support integrated within the iProc PCIe core.

On newer iProc platforms, gicv2m or gicv3-its based MSI support should be used



- msi-map: Maps a Requester ID to an MSI controller and associated MSI

sideband data



- msi-parent: Link to the device node of the MSI controller, used when no MSI

sideband data is passed between the iProc PCIe controller and the MSI

controller



Refer to the following binding documents for more detailed description on

the use of 'msi-map' and 'msi-parent':

  Documentation/devicetree/bindings/pci/pci-msi.txt

  Documentation/devicetree/bindings/interrupt-controller/msi.txt



When the iProc event queue based MSI is used, one needs to define the

following properties in the MSI device node:
@@ -80,9 +95,7 @@ Example: 
		phy-names = "pcie-phy";



		brcm,pcie-ob;

		brcm,pcie-ob-oarr-size;

		brcm,pcie-ob-axi-offset = <0x00000000>;

		brcm,pcie-ob-window-size = <256>;



		msi-parent = <&msi0>;

drivers/pci/host/pcie-iproc-bcma.c

+1 −0
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ static int iproc_pcie_bcma_probe(struct bcma_device *bdev) 


	pcie->dev = dev;



	pcie->type = IPROC_PCIE_PAXB_BCMA;

	pcie->base = bdev->io_addr;

	if (!pcie->base) {

		dev_err(dev, "no controller registers\n");

drivers/pci/host/pcie-iproc-msi.c

+1 −0
Original line number Diff line number Diff line
@@ -563,6 +563,7 @@ int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node) 
	}



	switch (pcie->type) {

	case IPROC_PCIE_PAXB_BCMA:

	case IPROC_PCIE_PAXB:

		msi->reg_offsets = iproc_msi_reg_paxb;

		msi->nr_eq_region = 1;

drivers/pci/host/pcie-iproc-platform.c

+14 −14
Original line number Diff line number Diff line
@@ -30,9 +30,15 @@ static const struct of_device_id iproc_pcie_of_match_table[] = { 
	{

		.compatible = "brcm,iproc-pcie",

		.data = (int *)IPROC_PCIE_PAXB,

	}, {

		.compatible = "brcm,iproc-pcie-paxb-v2",

		.data = (int *)IPROC_PCIE_PAXB_V2,

	}, {

		.compatible = "brcm,iproc-pcie-paxc",

		.data = (int *)IPROC_PCIE_PAXC,

	}, {

		.compatible = "brcm,iproc-pcie-paxc-v2",

		.data = (int *)IPROC_PCIE_PAXC_V2,

	},

	{ /* sentinel */ }

};
@@ -84,19 +90,6 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev) 
			return ret;

		}

		pcie->ob.axi_offset = val;



		ret = of_property_read_u32(np, "brcm,pcie-ob-window-size",

					   &val);

		if (ret) {

			dev_err(dev,

				"missing brcm,pcie-ob-window-size property\n");

			return ret;

		}

		pcie->ob.window_size = (resource_size_t)val * SZ_1M;



		if (of_property_read_bool(np, "brcm,pcie-ob-oarr-size"))

			pcie->ob.set_oarr_size = true;



		pcie->need_ob_cfg = true;

	}
@@ -115,7 +108,14 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev) 
		return ret;

	}



	/* PAXC doesn't support legacy IRQs, skip mapping */

	switch (pcie->type) {

	case IPROC_PCIE_PAXC:

	case IPROC_PCIE_PAXC_V2:

		break;

	default:

		pcie->map_irq = of_irq_parse_and_map_pci;

	}



	ret = iproc_pcie_setup(pcie, &res);

	if (ret)

drivers/pci/host/pcie-iproc.c

+848 −101

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