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Commit f86bd61f authored Mar 28, 2007 by Uwe Kleine-König Committed by Russell King Apr 21, 2007

[ARM] 4294/1: ns9xxx: Determine system clock from PLL register settings

The function attribute const is abused here as the PLL register is read. But I
think this is all right because the PLL register cannot change without a reset.

Note: This patch depends on 4293/1

Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent 940089e0

include/asm-arm/arch-ns9xxx/clock.h

+32 −2

Original line number	Diff line number	Diff line
		@@ -11,13 +11,43 @@
		#ifndef __ASM_ARCH_CLOCK_H
		#define __ASM_ARCH_CLOCK_H

		#include <asm/arch-ns9xxx/regs-sys.h>

		#define CRYSTAL 29491200 /* Hz */

		/* The HRM calls this value f_vco */
		static inline u32 ns9xxx_systemclock(void) __attribute__((const));
		static inline u32 ns9xxx_systemclock(void)
		{
		u32 pll = SYS_PLL;

		/*
		* This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c)
		* The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in
		* time.c).
		*
		* The following values are given:
		* - TIMERCLOCKSELECT == 2^i for an i in {0 .. 6}
		* - CRYSTAL == 29491200 == 2^17 * 3^2 * 5^2
		* - ND in {0 .. 31}
		* - FS in {0 .. 3}
		*
		* Assuming the worst, we consider:
		* - TIMERCLOCKSELECT == 64
		* - ND == 0
		* - FS == 3
		*
		* So HZ should be a divisor of:
		* (CRYSTAL * (ND + 1) >> FS) / TIMERCLOCKSELECT
		* == (2^17 * 3^2 * 5^2 * 1 >> 3) / 64
		* == 2^8 * 3^2 * 5^2
		* == 57600
		*
		* Currently HZ is defined to be 100 for this platform.
		*
		* Fine.
		*/
		return 353894400;
		return CRYSTAL * (REGGET(pll, SYS_PLL, ND) + 1)
		>> REGGET(pll, SYS_PLL, FS);
		}

		static inline u32 ns9xxx_cpuclock(void) __attribute__((const));