Loading arch/arm64/boot/dts/qcom/sdxprairie-regulator.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -495,7 +495,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-enable-ramp-delay = <100>; gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; enable-active-high; }; Loading @@ -505,7 +505,7 @@ regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-enable-ramp-delay = <100>; gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; enable-active-high; }; Loading arch/arm64/boot/dts/qcom/sdxprairie.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1444,6 +1444,7 @@ "eth_rgmii_clk", "eth_slave_ahb_clk"; qcom,phy-intr-redirect = <&tlmm 90 GPIO_ACTIVE_LOW>; qcom,phy-reset = <&tlmm 91 GPIO_ACTIVE_LOW>; qcom,phy-reset-delay-msecs = <10>; qcom,emac-pps0-test-intr = <&tlmm 31 GPIO_ACTIVE_LOW>; vreg_rgmii-supply = <&pmxprairie_vref_rgmii>; vreg_emac_phy-supply = <&vreg_emac_phy>; Loading Loading
arch/arm64/boot/dts/qcom/sdxprairie-regulator.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -495,7 +495,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-enable-ramp-delay = <100>; gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; enable-active-high; }; Loading @@ -505,7 +505,7 @@ regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-enable-ramp-delay = <100>; gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; enable-active-high; }; Loading
arch/arm64/boot/dts/qcom/sdxprairie.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1444,6 +1444,7 @@ "eth_rgmii_clk", "eth_slave_ahb_clk"; qcom,phy-intr-redirect = <&tlmm 90 GPIO_ACTIVE_LOW>; qcom,phy-reset = <&tlmm 91 GPIO_ACTIVE_LOW>; qcom,phy-reset-delay-msecs = <10>; qcom,emac-pps0-test-intr = <&tlmm 31 GPIO_ACTIVE_LOW>; vreg_rgmii-supply = <&pmxprairie_vref_rgmii>; vreg_emac_phy-supply = <&vreg_emac_phy>; Loading